Other Parts Discussed in Thread: UCD3138
Dear Champs,
I am asking this for our customer following the timing concern of F28004x I2C/PMBus module to meet SMBus 2.0.
Referring to:
https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/874162/3235147#3235147
The user can implement some software codes.
However, they are still concerned about the native hardware module timing.
See Sec 3.1.1 (Page 11) of
In Figure 3-1: SMBus timing measurements,
It says,
Thd:dat (Data hold time) as 300 ns (min) and Tsu:dat (Data setup time) as 250 ns (min).
In F280049 datasheet (http://www.ti.com/lit/ds/symlink/tms320f280049.pdf)
// I2C
Page 151
Sec 5.12.2.1 I2C Electrical Data and Timing/Table 5-67. I2C Timing Requirements
It says,
th(SCL-DAT) Hold time, data after SCL fall as 0 ns (min)
tsu(DAT-SCL) Setup time, data before SCL rise as 100 ns (min).
// PMBus
Page 153
5.12.3.1 PMBus Electrical Data and Timing/Table 5-71. PMBus Standard Mode Switching Characteristics
tHD;DAT Data hold time after SCL fall as 300 ns (min)
tSU;DAT Data setup time before SCL rise as 250 ns (min)
Questions:
We are concerned that the F28004x I2C data hold/setup min time are different from those of SMBus 2.0 spec.
Would you please help clarify and confirm?
Is only F28004x PMBus can meet the data hold/setup min time of SMBus 2.0 or both F28004x I2C and PMBus can meet it?
Note that in Page 58 "Timing specification differences between SMBus and I2C" of http://smbus.org/specs/smbus20.pdf
"SMBus defines a data hold time, the time during which SMBDAT must remain valid from the falling edge
of SMBCLK, of 300 nS. I2C defines this hold time as zero."
This is critical for the user to meet the spec of their end customers.
Wayne Huang