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Original question:

CCS/TMS320F280049: EPWM4 Phase Shift is not working

TMS320F280049C: EPWM1/2/3 phade shift not work well

chenghu yang
Prodigy 40 points
Part Number: TMS320F280049C

I want to use EPWM1/2/3 to phase shift convter, EPWM1 is master, EPWM2/3 is slave.

but EPWM2 do not work well,if I enable phase(EPWM_enablePhaseShiftLoad(EPWM2_BASE);), TBCTR is working and  beyond TBPRD,it seems not sync to EPWM1;if disable PSEN,TBCTR is normal.

I find the similar question about phase shift , it has a different.

my configuration is here.

EPWM1 configuration:

EALLOW;
EPWM_setPeriodLoadMode(EPWM1_BASE, EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(EPWM1_BASE, DCDC_PSFB_PRD_NOR);
EPWM_setTimeBaseCounter(EPWM1_BASE, 0);
EPWM_setPhaseShift(EPWM1_BASE, 0);
EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(EPWM1_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1);

EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_A, 0);
EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_B, 0);
EPWM_setCounterCompareShadowLoadMode(EPWM1_BASE, EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareShadowLoadMode(EPWM1_BASE, EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);

EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);

EPWM_setDeadBandCounterClock(EPWM1_BASE, EPWM_DB_COUNTER_CLOCK_FULL_CYCLE);
EPWM_setRisingEdgeDelayCount(EPWM1_BASE, LEAD_RED);
EPWM_setFallingEdgeDelayCount(EPWM1_BASE, LEAD_FED);
EPWM_setDeadBandDelayMode(EPWM1_BASE, EPWM_DB_RED, true);
EPWM_setDeadBandDelayMode(EPWM1_BASE, EPWM_DB_FED, true);
EPWM_setRisingEdgeDeadBandDelayInput(EPWM1_BASE, EPWM_DB_INPUT_EPWMA);
EPWM_setFallingEdgeDeadBandDelayInput(EPWM1_BASE, EPWM_DB_INPUT_EPWMA);

EPWM_setDeadBandDelayPolarity(EPWM1_BASE, EPWM_DB_RED,EPWM_DB_POLARITY_ACTIVE_HIGH);
EPWM_setDeadBandDelayPolarity(EPWM1_BASE, EPWM_DB_FED,EPWM_DB_POLARITY_ACTIVE_LOW);

EPWM_disablePhaseShiftLoad(EPWM1_BASE);
EPWM_setSyncOutPulseMode(EPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);

EPWM2 configuration:

EALLOW;
EPWM_setPeriodLoadMode(EPWM2_BASE, EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(EPWM2_BASE, DCDC_PSFB_PRD_NOR);
EPWM_setTimeBaseCounter(EPWM2_BASE, 2);
EPWM_setPhaseShift(EPWM2_BASE, 2);
EPWM_setTimeBaseCounterMode(EPWM2_BASE, EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(EPWM2_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1);

EPWM_setCounterCompareValue(EPWM2_BASE, EPWM_COUNTER_COMPARE_A, 0);
EPWM_setCounterCompareValue(EPWM2_BASE, EPWM_COUNTER_COMPARE_B, 0);
EPWM_setCounterCompareShadowLoadMode(EPWM2_BASE, EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareShadowLoadMode(EPWM2_BASE, EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);

EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);

EPWM_setDeadBandCounterClock(EPWM2_BASE, EPWM_DB_COUNTER_CLOCK_FULL_CYCLE);
EPWM_setRisingEdgeDelayCount(EPWM2_BASE, LEAD_RED);
EPWM_setFallingEdgeDelayCount(EPWM2_BASE, LEAD_FED);
EPWM_setDeadBandDelayMode(EPWM2_BASE, EPWM_DB_RED, true);
EPWM_setDeadBandDelayMode(EPWM2_BASE, EPWM_DB_FED, true);
EPWM_setRisingEdgeDeadBandDelayInput(EPWM2_BASE, EPWM_DB_INPUT_EPWMA);
EPWM_setFallingEdgeDeadBandDelayInput(EPWM2_BASE, EPWM_DB_INPUT_EPWMA);

EPWM_setDeadBandDelayPolarity(EPWM2_BASE, EPWM_DB_RED,EPWM_DB_POLARITY_ACTIVE_HIGH);
EPWM_setDeadBandDelayPolarity(EPWM2_BASE, EPWM_DB_FED,EPWM_DB_POLARITY_ACTIVE_LOW);

EPWM_enablePhaseShiftLoad(EPWM2_BASE);
EPWM_setSyncOutPulseMode(EPWM2_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);

EPWM_setSyncOutPulseMode(EPWM2_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);
EPWM_setPhaseShift(EPWM2_BASE, 250);
EPWM_setCountModeAfterSync(EPWM2_BASE, EPWM_COUNT_MODE_UP_AFTER_SYNC);

  • +1
    TI__Mastermind 24095 points

    Hi,


    Does this happen when you are using values for TBPRD that are smaller than the TBPHS?
    One possibility is that upon synchronization, value loaded to the TBCTR is more than period then, counter will not wrap around.
    It'll continue to count beyond the TBPRD.

  • 0
    Prodigy 40 points

    hi:

        Yes.My backgroud change the period.when frequency low (high TBPRD ) to low fraquency(low TBPRD) has similar result.

        after Test,I find some issue:

        EPWM2 configuration change to :

        EPWM_setTimeBasePeriod(EPWM2_BASE, DCDC_PSFB_PRD_NOR - 1);

        1. when Phase value change to 0, EPWM2 lost a period.

        lead :

        channel 3: EPWM1A

        channel 4: EPWM1B

        lag:

        

        channel 1: EPWM2B

        channel 2: EPWM2A

         

       accord to techinical reference, should not appear that issue.

       

    can you kwon the reason and how to resolve it

  • 0 in reply to chenghu yang
    TI__Mastermind 24095 points

    Hi,


    chenghu yang said:
    when Phase value change to 0, EPWM2 lost a period

    What you are showing is not period being lost. It is the expected behavior. Since you are loading the phase to zero, it'll abruptly change the counter value and that could result in missing the compare events for that cycle. You have to expect such behavior when you change the period/phase abruptly.

  • 0 in reply to Subrahmanya
    Prodigy 40 points

    HI

          yes,actually lost compare events.

          i mean,this is not expect behavior. 

         1.as TBPRD of EPWM2 < EPWM1,before EPWM1 conter is to 0,the counter of EPWM2 is  to 0 ,so the ZERO events should be action. 

         PLS see following logic.

    2. what's period/phase abruptly means, if anyvalue change to  0 is abruptly change? 

    oscilloscope picture show is phase just  100 to 0.

  • 0 in reply to chenghu yang
    TI__Mastermind 24095 points

    Hi,

    chenghu yang said:
    as TBPRD of EPWM2 < EPWM1,before EPWM1 conter is to 0,the counter of EPWM2 is  to 0 ,so the ZERO events should be action. 

    Yes - I would expect the Zero action to take effect - if you are loading a phase value of Zero. What action did you define for zero?
    If it's PWM set high, then PWM is already high - hence it's of no consequence. It seems, what is missed is the CMPA event in the waveform. 
    Is that correct?


    chenghu yang said:
    what's period/phase abruptly means, if anyvalue change to  0 is abruptly change? 

    You need to make sure that the CMPA event is not missed (load CMPA value accordingly) as you know upfront the value of the phase you are loading and counter value.

  • 0 in reply to Subrahmanya
    Prodigy 40 points

    HI :

          

    as TBPRD of EPWM2 < EPWM1,before EPWM1 conter is to 0,the counter of EPWM2 is  to 0 ,so the ZERO events should be action. 

    Yes - I would expect the Zero action to take effect - if you are loading a phase value of Zero. What action did you define for zero?
    If it's PWM set high, then PWM is already high - hence it's of no consequence. It seems, what is missed is the CMPA event in the waveform. 
    Is that correct?

                

             seem to zero event is not active.

             I want to EPWM2A is high when counter is zero,the same time EPWM2B is low.

             EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);

             but the result is when  phase = 0, EPWM2A  is low and EPWM2B is high.this is a big problem.

             

        channel 3: EPWM1A

        channel 4: EPWM1B

        channel 1: EPWM2B

        channel 2: EPWM2A

          

  • 0 in reply to chenghu yang
    TI__Mastermind 24095 points

    Hi,

    Yes, I would expect counter zero event to take effect. Because you are loading a phase of zero.

    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A ,EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD);

    Can you use CMPA instead of timebase period event? Is your application 50% duty all the time?

  • 0 in reply to Subrahmanya
    Prodigy 40 points

    HI

        sorry for late responce.

        yes,all the time.

        can you tell me the why change period ecents to CMPA event? is there different?

  • 0 in reply to chenghu yang
    TI__Mastermind 24095 points

    Hi,
    If it's a fixed duty cycle then you can use Period event, no need to use CMPA event.
    It still doesn't explain why the counter zero action is being missed.
    Can you load a value of 1 in the phase and counter direction to be down count up on sync?
    I want to make sure the zero event is not missed - hence loading asking you to check with a phase of 1 additional PWM clock cycle.
    This will ensure that the zero event occurs and corresponding action should take place.
    Let me know your observations,