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NHET MCMP Instruction when its DATA Field value is equal to CNT MAX DATA Field value

Pashan None
Genius 5660 points
Other Parts Discussed in Thread: TMS570LS3137

Hello Support,

I am trying to understand whether PIN_ACTION or the OPPOSITE PIN Action will occur under the following condition:

REG=A is being used by CNT to update.

CNT MAX Data Field = MCMP DATA Field

MCMP is comparing Register A with its DATA Field to generate PWM Signal [PIN_ACTION at Compare Point and OPPOSITE PIN Action at Z-Flag point]

Comparison Mode is REG_GE_DATA.

MCMP under the above mentioned condition will operate PIN_ACTION or OPPOSITE_PIN_ACTION [due to Z-Flag being set] for the next LR HET Loop.

Please explain with details.

Thank you.

Regards

Pashan

 

  • 0
    TI__Expert 7650 points

    Hello Pashan,

    We have received your question and asking our NHET experts to respond.

  • 0
    TI__Guru 68920 points

    Hi Pashan,

    PIN_ACTION always occurs when the compare matches,  so in this case it occurs when the register A becomes greater than the

    immediate data field of the instruction.

    OPPOSITE Pin action occurs (if enabled) after the CNT instruction sets the Z flag.  

    I say sometimes because there are 4 pin actions to select from,  two also enable the opposite pin action (PULSEHI, PULSELO).       The other two (SET, CLEAR) do not enable the opposite pin action.    So it's up to the programmer to select  whether opposite pin action is desired or not.

    One subtle point I should mention about the MCMP,  a bit unrelated but took me some time to grasp this.   Let's say you're running with 128 HR clocks in each loop which would mean the hi-res bits are 7:0.    Whatever you select for the loop resolution 'max' in the CNT instruction isn't actually the max for the MCMP.   The max for the MCMP is the max of the CNT instruction + 0x7F.     So let's say you have CNT counting to a max value of 0x20,  the count including Hi-Res will actually range from 0 to 0x107F  (not 0x1000).  So you could set your MCMP value up to 0x107F to get a minimum of 1 HR clock pulse [assuming MCMP is in Hi-Res mode].  

    Best Regards,

    Anthony

  • 0 in reply to Anthony F. Seely
    Genius 5660 points

    Hello Anthony,

    I am trying to generate PWM from 0% [Full OFF] to 100% [Full ON] using MCMP DATA Field changes and PULSELO as parameter.

    CNT MAX Field defines 100% duration.

    Looks like I can never get 100% [Full ON] as there will be always one LR or HR count of GLITCH [depending upon MCMP is HR or LR Mode of comparison] when I say 100% under the above mentioned condition using MCMP DATA Field assuming PULSELO is active always.

    Similarly there will be one GLITCH when 0% [Full OFF] is requested using MCMP DATA Field assuming PULSELO is active always.

    Are both of the above statements correct?

    Eagerly waiting to hear from you.

    Thank you.

    Regards

    Pashan

     

  • 0 in reply to Pashan None
    TI__Guru 68920 points

    Hi Pashan,

    I'm able to get 0% by programming 0 into the MCMP data field,

    and 100% by programming the max counter value + 1.  

    I did this in Hi-Res, and with the new RM48LS silicon; but I don't think

    this behavior is different on the RM48LS.

    Let me know if you don't get the same result and we can dig further.

    Thanks,

    Anthony

     

  • 0 in reply to Anthony F. Seely
    Genius 5660 points

    Hello Anthony,

    Are you using SYNCHRONOUS PWM?

    I am using

     CNT

     MCMP

    MOV32  -- to change the duty-ratio

    I think you are changing MCMP Data Field.

    Please let me know if you are using MOV32 to change from < 100% to 100% and how the transition looks at the Oscilloscope.

    Thank you.

    Regards

    Pashan

     

  • 0 in reply to Pashan None
    Genius 5660 points

    Hello Anthony,

    Can you please verify at your end for Synchronous PWM with 100% and let me know the test result?

    Thank you.

    Regards

    Pashan

     

  • 0 in reply to Pashan None
    TI__Guru 68920 points

    Hi Pashan,

    There's a reason that I didn't wind up using the simple MCMP but I think I was trying to AND two of these together with AND-SHARE and make a symmetric PWM out of the combination, and if I remember right that didn't work on all the transitions. 

    But I just tested the simply asymmetrical PWM case again and get 0 to 100% out of the attached program,  for a TMS570LS3137 HDK.  You might need to rebuild if you are using RM48.  

    If you open a memory window on address 0xFF460000 to view the N2HET RAM, and put an oscilloscope on N2HET1[0] with the timebase set to about 2.5us per division and trigger on one of the edges, you can vary the value at address 0xFF460018 (default is 0x1FE there).     A value of 0 gives me a 100% duty cycle,  a value of 0x400 a 0% duty cycle.  (you should be able to reverse this if you want by changing the HET MCMP instruction to PULSELO instead of PULSEHI).

    Best Regards,

    Anthony

    4722.pwm_0_100.zip