Hi all
I’m sentenced to implement a IO-driver for a Hercules Microcontroller. I want to use N2HET (TMS570LS3137) to generate some PWM-Signals. Some of the outputs belong together, some are independent, but all of them handle high resolution and XORing of outputs and everything must be managed in the same N2HET program because the pins are only supported by N2HET1. Also because I have to deal with dead times and symmetrical PWM, the black box-NHET-program generated by HalCoGen is no option for my application. (The LR should not exceed 32 HR because of the speed and resolutions constraints I have to fulfil. Therefore I wiped out my first attempts with complicated angle calculations or the use of MOV64 to fill the data-field of PWCNT-statements and the use of Interrupts to keep the transaction consistent.) To keep the access to the buffer atomic, I decided to use HTU with double buffered transfers. In total I need four independent DCP-channels and frame sizes from 3 to 10 values. My Current N2HET-program is 24 statements long which mean that every little change in concept is likely to break my 32-statement barrier.
My N2HET-program looks somewhat like this:
(Simplified to 1 channel with 2 pwm-signals)
; Output1
; routed to Pin15 on TMS570LS3137PGN
Output1a .equ 22 ; N2HET1[30] has to be XORed with N2HET1[31]
Output1b .equ 23
; Output2
; routed to Pin139 on TMS570LS3137PGN
Output2a .equ 16 ; N2HET1[16] has to be XORed with N2HET1[17]
Output2b .equ 17
L00 DJZ {next=L01,reqnum=1,request=GENREQ,control=OFF,cond_addr=B01, reg=NONE,data=0 }; sets period for PWM
L01 PWCNT {next=L02,reqnum=1,request=NOREQ ,hr_lr=HIGH,control=OFF,cond_addr=L02,en_pin_action=ON ,pin=Output1a ,action=SET, reg=NONE,data=0,hr_data=0}; Output1a on
L02 PWCNT {next=L03,reqnum=1,request=NOREQ ,hr_lr=HIGH,control=OFF,cond_addr=L03,en_pin_action=ON ,pin=Output1b ,action=SET, reg=NONE,data=0,hr_data=0}; Output1b off
L03 PWCNT {next=L04,reqnum=1,request=NOREQ ,hr_lr=HIGH,control=OFF,cond_addr=L04,en_pin_action=ON ,pin=Output2a ,action=SET, reg=NONE,data=0,hr_data=0}; Output2a on
L04 PWCNT {next=L00,reqnum=1,request=NOREQ ,hr_lr=HIGH,control=OFF,cond_addr=L00,en_pin_action=ON ,pin=Output2b ,action=SET, reg=NONE,data=0,hr_data=0}; Output2b off
For every DCP-Channel I defined two buffers, something like:
typedef struct
{
unsigned int tPwmPeriod;
unsigned int tPwm1on;
unsigned int tPwm1off;
unsigned int tPwm2on;
unsigned int tPwm2off;
} PwmSet_t;
PwmSet_t PwmSetA;
PwmSet_t PwmSetB;
And the Setup for HTU is like (also simplified)
void htuInit(void){
unsigned char channel = 1;
#define MAIN2NHET 0x008F0000 /* DCP[Channel] CPx
DIR = MainMemory to NHET memory
SIZE = 32-bit
ADDMH = 16 bytes
ADDFM = post-increment main memory
TMBA = auto switch buffer A
TMBB = auto switch buffer B
IHADDR = (LINE1_of_DCP[Channel]NHET_ProgPart)*4+2)<<2 data field */
#define LINE1_NHET_PWM 1
#define IHADDR_PWM (LINE1_NHET_PWM-1)*4+2 //(Only valid for position of DATA-Field)
// PWM-Signals
htuCPRAM ->DCP[channel].ITCOUNT = 0x00000001 + sizeof(PwmSet_t)<<4;
htuCPRAM ->DCP[channel].IHADDRCT = MAIN2NHET + (IHADDR_PWM)<<2;
htuCPRAM ->DCP[channel].IFADDRA = (unsigned int) &PwmSetA; /* DCP[Channel] CPA start address of destination buffer */
htuCPRAM ->DCP[channel].IFADDRB = (unsigned int) &PwmSetB; /* DCP[Channel] CPB start address of destination buffer */
htuREG ->BFINTC = 0x00000000 + (3 << (channel * 2)); /* disable buffer full interrupt for DCP[channel] - CPA and CPB*/
// Global enable of HTU
htuREG ->GC = 0x00010000; /* enable HTU */
}
(In my main Program I switch CPENA, but I also tried it with single buffering to get a first result. No success...)
Can somebody provide me a working example of how to set up HTU with direction CPU to N2HET-RAM or suggest a way to debug code like this?
I based my code on spna130a from TI and read a lot about HTU and N2HET but it’s very hard to see where I stuck. I changed me approach several times in the last days and I’m also open to totally different approaches.
Regards, Matthias
