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TMS570LC4357 EPC Non-correctable error and speculative fetch

Libo Luo
Intellectual 940 points
Other Parts Discussed in Thread: TMS570LC4357

Hello forum team,

I see some strange behavior which seems to be related with the speculative fetch.

We have the same issue with the device TMP570LC4357 (and 4355). Our software is composed of two parts: the boot loader and the application. If we only flash the bootloader,  the SW enters an endless loop where an EPC non-correctable error is somehow triggered permanently. If we flash the same bootloader together with the application, then the SW enters the application without problem. If we change the boot loader a little, sometimes the new bootloader can run without application, and it doesn't enter any NMI endless loop.

We assume that the Flash ECC is not valid if application is not flashed. If in such case, the ARM core does some speculative fetch, it may access to application Flash region which might trigger an EPC non-correctable error, or more exactly the ESM group 2, Channel 3 is set. This error disappears if the application is flashed and speculative fetch reaches a flash region with valid ECC. Since the fetch is speculative, some boot loader can run without application being flashed. In other words, such boot loader also does some speculative fetch at Flash where application should be available, but the ECC there happen to be correct. Or such speculative fetch reaches an address of boot loader itself which has valid ECC.

According to TRM SPNU563, Section 7.4.1:

" A speculative fetchto a location with invalid ECC, which is subsequently not used, will not create an abort, but will set the ESM flags for a correctable or uncorrectable error. An uncorrectable error will unconditionally cause the nERROR pin to toggle low."

Question 1:

Since ESM flag (2.3) is set, if NMI is enabled, this will trigger a NMI, right? So far we haven't seen any abort, but have seen NMI very frequently.

Question 2:

In the data sheet of TMS570LC4357, section 5.19.2, Table 5-45, the ESM flag 2.3 is described. What do "Event reference 0x71",  "Event bus m bit 48" mean? ESM2.3 can only be set by a EPC non-correctable error? Or any other errors?

Question 3:

If the speculative fetch in Flash with invalid ECC causes the problem described above, we have to make sure the whole Flash is initialized with valid ECC (as suggested in TRM section 7.4.1). If the device is at customer side, it may happen that the initialization of the unused Flash is disrupted by wrong operation, by unexpected power off etc. If this happens, then the boot loader may run into endless loop because of ESM2.3 error. Which means we can no more flash the application. Do you have any suggestion how avoid such problem?

Thank you and best regards,

Libo

 

 

 

  • 0
    TI__Mastermind 22715 points

    Libo,

    (1) Uncorrectable ECC errors in reading Flash or RAM will only set ESM2.3. No abort will be generated.

    (2) The event numbers are defined in the Cortex R5 TRM. Uncorrectable ECC errors in reading RAM and Flash will only set ESM2.3. They are not logged by the EPC module.

    (3)One option to solve this issue is to set MPU for the bootloader to block the access to the erased Flash regions. It will not affect the programming of erased regions because the programming is done via the Flasher wrapper and CPU does not access those regions during programming. When you finished programming, you can re-configure MPU to enable the access to all Flash regions. The limitation is that you will not be able to verify the programming data during programming. You can use CRC module to calculate CRC for the data being programmed and do another CRC check on the programmed data after all the programming is complete.

    Please let me know if you need any additional information.

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Intellectual 940 points

    Hello Zhaohong,

    thanks a lot for your answer. I have configured the MPU so that the unflashed region is not executable and read only.We haven't detected any issue in the tests. We assume this problem is solved. Thank you very much for the support!

    Best regards,

    Libo