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TMS570LS3137 ESM group 3 error

Other Parts Discussed in Thread: HALCOGEN, TMS570LS3137

Hello,

on one of our devices I am getting the ESM group 3 error. I am using HalCoGen startup code and the program stops cycling at 

    /* Check if there were ESM group3 errors during power-up.
     * These could occur during eFuse auto-load or during reads from flash OTP
     * during power-up. Device operation is not reliable and not recommended
     * in this case.
     * An ESM group3 error only drives the nERROR pin low. An external circuit
     * that monitors the nERROR pin must take the appropriate action to ensure that
     * the system is placed in a safe state, as determined by the application.
     */
    if (esmREG->ESTATUS1[2])
    {
/* USER CODE BEGIN (20) */
/* USER CODE END */
        while(1);
    }

The value of ESTATUS1[2], which is mapped to esm Stat3 register, is 0x8.

Sometimes the code falls into dabort

ramErrorReal
        b       ramErrorReal        ; branch here forever as continuing operation is not recommended

I can not find any error code definition for the 0x8 value. I susspected that the Flash is gone as we were using the device for intensive development. But there is no error in FEdacStat at address 0xFFF8701C.

Will you please help me with finging what went wrong?

Thank you, Michal.

  • It looks like the error disappeared after I have moved 

        /* Enable response to ECC errors indicated by CPU for accesses to flash */
        flashWREG->FEDACCTRL1 = 0x000A060A;
    

    above

    /* Enable CPU ECC checking for ATCM (flash accesses) */
        _coreEnableFlashEcc_();

    The FEDACCTRL1 modification was below the function call, when it was failing. Bud maybe it is just coincidence. In my opinion this should not matter.

  • Michael,

    I did generate a test code with halcogen 04.01.00 and the code sequence in sys_startup.c is:

    /* Enable response to ECC errors indicated by CPU for accesses to flash */
    flashWREG->FEDACCTRL1 = 0x000A060AU;

    /* USER CODE BEGIN (10) */
    /* USER CODE END */

    /* Enable CPU ECC checking for ATCM (flash accesses) */
    _coreEnableFlashEcc_();

    I don't understand why it was not the case in your code.

    This requirement is mentioned in the TRM (spnu99b) as following:

  • OK, thank you for pointing this requirement out. I did not mentioned it. So it looks like this was the cause.

    The reason why I had it like this is that we have generated the code in the year 2012. So it has been probably fixed in some later HALCoGen release.

    May I ask you for pointing me to some source of ESM errors description for some future use?

    Thank you again.

  • Michal,

    The ESM error mapping is described in the device data sheet.

    The full ESM description is described in the Technical Reference Manual.

    Let me know which device you are using and I will send you the links to these 2 documents.

  • Hello, I am using TMS570LS3137 ZWT and RM48L952ZWT.

    I have both files downloaded, but was not able to find any information about the error codes stored in esm STAT3 register.