Issue with bootloading and RTOS

Ringolds Jargans

Other Parts Discussed in Thread: TMS570LS0332

Hi.

We were forced to update portASM.asm and portmacro.h from our previous version because it caused issues with some features (xWaitTaskNotify) in special cases. The update seemed to work fine when flashing directly to the MCU (without any code offset for bootloader). However, when compiled for bootloading and bootloaded the FW execution hangs (hard to say where since bootloaded).

Our main difference which causes the hanging is the following:

Old version:

//-----------the following is in portmacro.h


extern void vPortEnterCritical(void);
extern void vPortExitCritical(void);
#define portENTER_CRITICAL()		vPortEnterCritical()
#define portEXIT_CRITICAL()			vPortExitCritical()
#define portDISABLE_INTERRUPTS()    asm( " CPSID I" )
#define portENABLE_INTERRUPTS()     asm( " CPSIE I" )

//--------------------------the following is in port.c
/*
	 * Disable interrupts, and keep a count of the nesting depth.
	 */
	void vPortEnterCritical( void )
	{
	    /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
	    portDISABLE_INTERRUPTS();

	    /* Now interrupts are disabled ulCriticalNesting can be accessed
	    directly.  Increment ulCriticalNesting to keep a count of how many times
	    portENTER_CRITICAL() has been called. */
	    ulCriticalNesting++;
	}
	/*-----------------------------------------------------------*/

	/*
	 * Decrement the critical nesting count, and if it has reached zero, re-enable
	 * interrupts.
	 */
	void vPortExitCritical( void )
	{
	    if( ulCriticalNesting > 0 )
	    {
	        /* Decrement the nesting count as we are leaving a critical section. */
	        ulCriticalNesting--;

	        /* If the nesting level has reached zero then interrupts should be
	        re-enabled. */
	        if( ulCriticalNesting == 0 )
	        {
	            /* Enable interrupts as per portENABLE_INTERRUPTS(). */
	            portENABLE_INTERRUPTS();
	        }
	    }
	}

in the new version this is replaced by:

//-------------this is in portmacro.h
#pragma SWI_ALIAS(vPortEnterCritical, 2)
extern void vPortEnterCritical(void);
#pragma SWI_ALIAS(vPortExitCritical, 3)
extern void vPortExitCritical(void);
#pragma SWI_ALIAS(vPortDisableInterrupts, 5)
extern void vPortDisableInterrupts( void );
#pragma SWI_ALIAS(vPortEnableInterrupts, 6)
extern void vPortEnableInterrupts( void );
#define portENTER_CRITICAL()		vPortEnterCritical()
#define portEXIT_CRITICAL()			vPortExitCritical()
#define portDISABLE_INTERRUPTS()	vPortDisableInterrupts()
#define portENABLE_INTERRUPTS()		vPortEnableInterrupts()

//--------and the complementary part in portASM.asm
table
        .word    jumpTable

jumpTable
        .word    swiPortYield                 ; 0 - vPortYieldProcessor
        .word   swiRaisePrivilege         ; 1 - Raise Priviledge
        .word   swiPortEnterCritical         ; 2 - vPortEnterCritical
        .word   swiPortExitCritical          ; 3 - vPortExitCritical
        .word   swiPortTaskUsesFPU            ; 4 - vPortTaskUsesFPU
        .word    swiPortDisableInterrupts     ; 5 - vPortDisableInterrupts
        .word    swiPortEnableInterrupts      ; 6 - vPortEnableInterrupts
        .endasmfunc
;-------------------------------------------------------------------------------
; swiPortDisableInterrupts
        .asmfunc
swiPortDisableInterrupts
        mrs     r11, SPSR
        orr     r11, r11, #0x80
        msr     SPSR_c, r11
        bx      r14
        .endasmfunc
;-------------------------------------------------------------------------------
; swiPortEnableInterrupts
        .asmfunc
swiPortEnableInterrupts
        mrs     r11, SPSR
        bic     r11, r11, #0x80
        msr     SPSR_c, r11
        bx      r14
        .endasmfunc
;-------------------------------------------------------------------------------
; swiPortTaskUsesFPU
        .asmfunc
swiPortTaskUsesFPU
        bx      r14

        .endasmfunc
;-------------------------------------------------------------------------------
; swiRaisePrivilege

; Must return zero in R0 if caller was in user mode
        .asmfunc
swiRaisePrivilege
        mrs     r12, spsr
        ands    r0, r12, #0x0F      ; return value
        orreq   r12, r12, #0x1F
        msreq   spsr_c, r12
        bx      r14
        .endasmfunc
;-------------------------------------------------------------------------------
; swiPortEnterCritical
        .asmfunc
swiPortEnterCritical
        mrs     r11, SPSR
        orr     r11, r11, #0x80
        msr     SPSR_c, r11
        ldr     r11, ulCriticalNestingConst
        ldr     r12, [r11]
        add     r12, r12, #1
        str     r12, [r11]
        bx      r14
        .endasmfunc
;-------------------------------------------------------------------------------
; swiPortExitCritical
        .asmfunc
swiPortExitCritical
        ldr     r11, ulCriticalNestingConst
        ldr     r12, [r11]
        cmp     r12, #0
        bxeq    r14
        subs    r12, r12, #1
        str     r12, [r11]
        bxne    r14
        mrs     r11, SPSR
        bic     r11, r11, #0x80
        msr     SPSR_c, r11
        bx      r14
        .endasmfunc
;-------------------------------------------------------------------------------
; SetRegion

I am not an expert in asm. Thus i asume that the asm functions might map something differently, which causes issues when bootloading. Any suggestion would be helpful as to why this is happening and how to fix it.

We are running TMS570LS0332 MCU.

Thanks in advance.

over 9 years ago

0 Zhaohong Zhang over 9 years ago

TI__Mastermind 22715 points

If your application works without the bootloader (vector table at address 0x0), please check the vector table to the bootloader. Make sure that it passes the software interrupt correctly.

Thanks and regards,

Zhaohong

0 Vladimir Romanov over 9 years ago

Intellectual 940 points

SWI Interrupt vector point to code in bootloader. To solve this problem I use next code in bootloader. This code check source of SWI interrup and jump to bootloader or application realization. You must align .app_intvecs to application startup address using ,cmd linker script (0x18000 in code below is my application start address)

    .arm

    .sect ".app_intvecs"
;-------------------------------------------------------------------------------
; Application interrupt vectors layout
        .word 0 ;Reset
        .word 0 ;Undefined
app_vPortSWI
        .word 0 ;SWI
        .word 0 ;prefetch
        .word 0 ;dabort
        .word 0 ;reserved
        .word 0 ;IRQ
        .word 0 ;FIQ


;-------------------------------------------------------------------------------

    .text
    .ref vPortSWI
    .def    bl_vPortSWI
bl_vPortSWI
	cmp lr, #0x18000
	blo vPortSWI
	b app_vPortSWI

0 Ringolds Jargans over 9 years ago in reply to Zhaohong Zhang

Prodigy 230 points

Hi.

As mentioned the bootloaded firmware works with the previous version. Where I am not referencing the vPortEnter/Exit Critical and portDisable/Enable_Interrupts to the swi table in portASM.asm but using a function call and and individual asm command. Thus the jump from the bootloader to the application fw it self should not be the one causing the fault. Or you meant something else?

Here is my mapping for bootloader and main application:

/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */
--retain="*(.intvecs)"

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */
MEMORY{
	/*FLASH MEMORY */
    BTL_VECTORS 		(X)  : origin=0x00000000 length=0x00000020 vfill=0xffffffff
    FLASH_API   		(RX) : origin=0x00000020 length=0x00001388 vfill=0xffffffff
    BTL_APP   			(RX) : origin=0x000013A8 length=0x00002C58 vfill=0xffffffff
    APP_VECTORS			(X)  : origin=0x00004000 length=0x00000020 vfill=0xFFFFFFFF
    MAIN_APP  			(RX) : origin=0x00004020 length=0x0003BFC0 vfill=0xFFFFFFFF
    APP_VERIFICATION	(RX) : origin=0x0003FFE0 length=0x00000020 vfill=0xFFFFFFFF
    EEPROM  			(R)  : origin=0xF0200000 length=0x00004000 vfill=0xffffffff
	/*RAM */
    STACKS  	(RW) : origin=0x08000000 length=0x00000400
    SRAM     	(RW) : origin=0x08000400 length=0x00007C00
}

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */
SECTIONS{
    .intvecs : {} > BTL_VECTORS
    flashAPI :
   {
     ..\Release_AJSM_Off\Application\LiBalSource\LB_BL_flash.obj (.text)

     --library= F021_API_CortexR4_BE.lib < FlashStateMachine.IssueFsmCommand.obj
     									  FlashStateMachine.SetActiveBank.obj
     									  FlashStateMachine.InitializeFlashBanks.obj
     									  FlashStateMachine.EnableMainSectors.obj
     									  FlashStateMachine.IssueFsmCommand.obj
     									  FlashStateMachine.ScaleFclk.obj
                                          Init.obj
                                          Utilities.CalculateEcc.obj
                                          Utilities.WaitDelay.obj
                                          Utilities.CalculateFletcher.obj
                                          Read.MarginByByte.obj
                                          Read.Common.obj
                                          Read.FlushPipeline.obj
     									  Read.WdService.obj
                                          Async.WithAddress.obj
                                          Program.obj > (.text)
   } load = FLASH_API, run = SRAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)
    .text    : {} > BTL_APP
    .const   : {} > BTL_APP
    .cinit   : {} > BTL_APP
    .pinit   : {} > BTL_APP
    .bss     : {} > SRAM
    .data    : {} > SRAM
}
/*----------------------------------------------------------------------------*/

Main app:

*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    //BTL_VECTORS 		(X)  : origin=0x00000000 length=0x00000020 vfill=0xffffffff
    //FLASH_API   		(RX) : origin=0x00000020 length=0x00001388 vfill=0xffffffff
    //BTL_APP   			(RX) : origin=0x000013A8 length=0x00002C58 vfill=0xffffffff
    APP_VECTORS			(X)  : origin=0x00004000 length=0x00000020 vfill=0xFFFFFFFF
    MAIN_APP  			(RX) : origin=0x00004020 length=0x0003BFC0 vfill=0xFFFFFFFF
    APP_VERIFICATION	(RX) : origin=0x0003FFE0 length=0x00000020 vfill=0xFFFFFFFF
    EEPROM  			(R)  : origin=0xF0200000 length=0x00004000 vfill=0xffffffff
    STACKS  			(RW) : origin=0x08000000 length=0x00001500
    RAM     			(RW) : origin=(0x08001500) length=(0x00006B00)

/* USER CODE BEGIN (2) */
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > APP_VECTORS
    .cinit        : {} > MAIN_APP
    .pinit        : {} > MAIN_APP
	/* Rest of code to user mode flash region */
    .text         : {} > MAIN_APP
    .const        : {} > MAIN_APP
    .bss          : {} > RAM
    .data         : {} > RAM	
	
/* USER CODE BEGIN (4) */
	.sysmem 	  : {} > RAM
	//.init_data	: {} > EEPROM
/* USER CODE END */
}

From bootloader I just jump to 0x4000.

The bootloader interrupt table (intvecs.asm):

   .sect ".intvecs"


;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00
;    .ref _dabort
    .ref phantomInterrupt
    .def resetEntry

;-------------------------------------------------------------------------------
; interrupt vectors
resetEntry
        b   _c_int00               ;0x00
undefEntry
        b   undefEntry             ;0x04  Undefined instruction Interrupt
svcEntry
        b   svcEntry               ;0x08, Software interrupt
prefetchEntry
        b   prefetchEntry          ;0x0C, Abort (prefetch)
;        b   _dabort               ;0x10, Abort (data)
        b   phantomInterrupt       ;0x10, Abort (data)
        b   phantomInterrupt       ;0x14
        ldr pc,[pc, #-0x1b0]       ;0x18
        ldr pc,[pc, #-0x1b0]       ;0x1C

the application interrupt table (intvecs.asm)

    .sect ".intvecs"
    .arm

;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00
    .ref vPortSWI
    .ref _dabort
    .ref phantomInterrupt
    .def resetEntry

;-------------------------------------------------------------------------------
; interrupt vectors

resetEntry
        b   _c_int00
undefEntry
        b   undefEntry
        b   vPortSWI
prefetchEntry
        b   prefetchEntry
        b   _dabort
        b   phantomInterrupt
        ldr pc,[pc,#-0x1b0]
        ldr pc,[pc,#-0x1b0]

0 Ringolds Jargans over 9 years ago in reply to Vladimir Romanov

Prodigy 230 points

@Vladimir Romanov:
Alright. Got it. Thanks a lot.

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Issue with bootloading and RTOS