This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS1227: The interface between TMS570LS1227 and JLINK emulator JTAG cannot be connected

Part Number: TMS570LS1227
Other Parts Discussed in Thread: TMS570LS1224

The JLINK I used to connect the JTAG interface of TMS570LS1227 has no problem with the program simulation after several days!

Probably because I added this code to my program system.c

/** @b Clock source[7-3] is set to the disabled state */
/*SYSTEM_1->CSDISSET = 0x00000000U | (31U << 3U); 

I can't connect target board today!!!

After sending the "connect" command in JFLASH, the following error appears:

Connecting ...
- Connecting via USB to J-Link device 0
- J-Link firmware: J-Link V9 compiled Oct 25 2018 11:46:07
- Device "TMS570LS1227" selected.
- Executing InitTarget()
- TotalIRLen = 6, IRPrint = 0x01
- J-Link script: ICEPick found, enabling DAP of CPU core.
- TotalIRLen = 10, IRPrint = 0x0011
- JTAG chain detection found 2 devices:
- #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
- #1 Id: 0x3B95502F, IRLen: 06, TI ICEPick
- Identified core does not match configuration. (Found: None, Configured: Cortex-R4)
- Executing InitTarget()
- TotalIRLen = 6, IRPrint = 0x01
- J-Link script: ICEPick found, enabling DAP of CPU core.
- TotalIRLen = 10, IRPrint = 0x0011
- JTAG chain detection found 2 devices:
- #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
- #1 Id: 0x3B95502F, IRLen: 06, TI ICEPick
- ERROR: Could not power up debug port: Control/Status register reads 00000F02
- Target interface speed: 1000 kHz (Auto)
- VTarget = 3.291V
- Executing InitTarget()
- TotalIRLen = 6, IRPrint = 0x01
- J-Link script: ICEPick found, enabling DAP of CPU core.
- TotalIRLen = 10, IRPrint = 0x0011
- JTAG chain detection found 2 devices:
- #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
- #1 Id: 0x3B95502F, IRLen: 06, TI ICEPick
- Identified core does not match configuration. (Found: None, Configured: Cortex-R4)
- Executing InitTarget()
- TotalIRLen = 6, IRPrint = 0x01
- J-Link script: ICEPick found, enabling DAP of CPU core.
- TotalIRLen = 10, IRPrint = 0x0011
- JTAG chain detection found 2 devices:
- #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
- #1 Id: 0x3B95502F, IRLen: 06, TI ICEPick
- ERROR: Could not power up debug port: Control/Status register reads 00000F02
- ERROR: Failed to connect.
Could not establish a connection to target.

Now the 3.3v, 1.2v voltage  and 16Mhz Xtals in target board I measured are working normally!  and my Jlink emulator is working normally!

I strongly suspect that there is something wrong with the software that was programming in, which occupied the corresponding IO pins or disabled the relevant clock source, resulting in the inability to use JLink to communicate with it.

so The important question now is how do I get the software with problerm to stop running when it's powered on, or to erase FLASH in some other way???

anyone Experienced superior to answer it???

Thank you very much for your reply!!!

  • No one to answer this question?
  • Hello Lancell,

    By default, the clock monitoring circuit on TMS570LS1224 device is enabled. The clock monitoring circuit checks for the main oscillator frequency to be within a certain range using the HF LPO as a reference. If the HF LPO (clock source #5) is disabled with the clock monitoring still enabled, the clock monitor will indicate an oscillator fault. This fault will reset the device repeatedly and block you from connecting JTAG to the device.

    Please try this procedure to let CPU enter a debug state:
    1. Open the target configuration window, and launch the selected the configuration
    2. Switch to debug window
    3. Press the reset (nRST) button and hold it
    4. Click “Connect Target” immediately after you release the nRST button
    5. The board should be connected after couple tries
  • Thank you very much for your reply!

    According to your method, I tried it on my target board!

    Unfortunately, the result is not satisfactory!

    We found it difficult to find a suitable point in time, after releasing the reset signal, click the "Connect" button.

    And we found that the JLINK emulator has sent a reset signal to the pin NRST, but why is the program in Flash not stopped?

  • Hi Lancell,

    The clock fault causes the device reset which has high priority than JTAG. As far as I know, this is the only effect way.