CCS/TMS570LS3137-EP: CSS

Please provide us example projects that can used to load into the controller directly. I am new on this platform, what I will do with .c file? graphics are not aligned properly in to the HALCoGen.

Rahul T1 said:

graphics are not aligned properly in to the HALCoGen.

Please see attached screenshots.

Please see attached screenshots.

Whereas the graphics are displayed incorrectly when Windows 10 Display "Scale and layout" is set to 125%:

It looks like the HALCoGen restriction of only displaying the graphics correctly when Windows "Scale and layout" is set to 100% has been an outstanding issue for past 10 years.

In the datasheet of TMS570LS3137-EP controller, it has port A and B each of 8 bit, for our application we need more than this. How to use or configure other pins for general purpose IO?

Hi Rahul,

  Most of the peripheral pins can be configured as GPIO pins. I'm demonstrating using MibSPI1 SOMI[1] as a GPIO pin. Please see below. Here I configure the MibSPI1 SOMI[1] as an output pin with its initial state set to high. Once you complete your HalcoGen configuration you just go to File->Generate code to generate the project code. All the drivers you selected for your application will be automatically generated per your configuration settings. Please follow any example to create the project. 

  In the application if you want to dynamically change the state of the mibSPI SOMI[1] pin then you can just use the driver API like:

  mibspiInit();

  gioInit();

  gioSetBit(mibspiPORT1, PIN_SOMI_1, 1); // Set SOMI[1] to high. The PIN_SOMI_1 corresponds to bit 25 of the SPIPC3 register

We are designing PCB for our application, can you provide us design document for the TMS5703137CGWTMEP, like power supply selection, reset circuit, oscillator selection, pin configuration for external JTAG interface?

How may pins of TMS570LS3137EP can be used for GPIOs? We need nearly 56 GPIOs. 

Hi,

  According to the datasheet there are 144 pins that can be repurposed as GPIO. 

As for PCB design document, I will suggest you reference the HDK user's guide and its schematic. 

Provided schematic is of development board which is not that much useful for us. For your design "Integrated USB JTAG Emulator" is not required, we want to use external debug probe, In the development board schematic reset and JTAG circuit is very complicated see page number 7, 21, 23, 24, it is better if you provide us simplified schematic.

My application requirement:
1. 56 GPIO.
2. Timers
3. 1 SPI
4. 1 I2C
5. External JTAG.

Remaining features are not required.

This is my requirement, can u please tell me which things are required and which are not?

Can I use external JTAG Keil ULINK2?

Hi,

  Here is the Hercules TMS570LS12x LaunchPad schematic that you can reference. It is a simplified PCB compared to the HDK.  

  https://www.ti.com/lit/pdf/SPRR399

  I have not used Keil ULINK2 before. However, according to the both the Hercules product website as well as Keil website, the ULINK is a supported emulator.

https://www.ti.com/microcontrollers/hercules-safety-mcus/design-development.html

https://www.keil.com/dd/chip/6113.htm

Explain this section!

I want to use external JTAG or debug probe, please provide me information accordingly.

Hi,

  Page 24 of the HDK schematic will have more detail. Basically, the HDK can have three sources of the JTAG inputs. If you look at the HDK board you will see J4 connector, J19 the MiPi connector and the on-chip FTDI debug emulator. If there is no external JTAG debug probe connected to the HDK connectors (either J4 or J19) then the on-board FTDI (emulating as a XDS100 debug probe) will become the default debug probe. If you connect to either the J4 or J19 MiPi connector then the external debug probe will take over. The area of the circle you make is to switch in the nTRST depending on what is the debug probe connected. In your design, it should be much simpler as you only have one external JTAG connector. You can connect the nTRST from the JTAG connector to the nTRST pin of the MCU. 

  Also see below guideline. 

dev.ti.com/tirex/explore/node?node=AEnDVmEAFjxrbZ8Vfn.lBg__FUz-xrs__LATEST

In the schematic of LAUNCHXL2-TMS57012-RM46 the JTAG Reset is connected to NPORRST and in TMS570LS31x HDK the JTAG Reset is connected to WARM_RSTn.

Which one should i follow for our design? (only external JTAG is needed)

Hi,

  Can you please show a screenshot where you see the nPORRST is connected to the JTAG in the LaunchPad and where the WARM_RSTn is connected to the JTAG Reset in the HDK?

OK, I see the difference. In the HDK diagram you show, the ARM_JTAG_RESETn is used to "warm reset" the target device while in the LaunchPad diagram the Hercules_MR_PB5 is connected to the nPORRST input of the target device (the TMS570LS21x device). However, the same Hercules_MR_PB5  is also used to reset the ICDI (emulated by the TM4C129 processor) on-board debug probe. The TM4C129 processor only has one nPORRST input.

I don't think it really matters which way you connect the nRESET pin from the JTAG connector as it is not used by the JTAG scan controller (e.g. Debug Probe). On the Hercules device, the debugger will instruct the on-chip DAP (Debug Access Port) module to assert the system reset.

If you really want to connect the nRESET, I will suggest you connect it to the nRST pin of the target device like the HDK. 

I want generate the delay of 100ms using timer, when it overflows timer interrupt should be generated.

For that how to configure timer for 100ms in the HALCoGen and in the ccs? And how to use it, provide me HAL functions for the same like "Start_Timer(x);"

Also provide me application note on timers and user manual for HALCoGen which contains how to configure each module and how to use them?

Did you have a chance to go through the HalcoGen RTI (Real Time Interrupt) example? If not, please go through this example as shown below. As I mentioned in my very first reply, if you go to Help -> Help Topics -> Examples, you will find all the available examples. If you go to Help -> Help Topics -> Modules, you will find all the API documentation. In this example, the timer period is 1s to blink a LED. You will modify it the period for 100ms for your application. The API to start the timer will be rtiStartCounter(). To set the timer period dynamically you can call rtiSetPeriod(). 

I want to interface AT24C256(256k EEPROM; I2C protocol) with Herciles TMS570LS31x/21x Development Kit, please provide me hardware connections. I want to read and write data into the AT24C256 ,so provide me the software coding steps also.

Given example is not useful for me.

We don't have example specifically for AT24C256. We can't possibly have examples for unlimited number of I2C devices out on the market. There are five I2C examples in the HalcoGen. I will suggest you go through them. The example_i2c_pcf8570 interfaces to an external RAM device that may come closest to your device. Other examples are useful as well. Hardware wise, it is a matter of connecting the SDA and SCL pins between the MCU and the external I2C device. Make sure you have a pulliup resistor (e.g. 10k) on each bus. It is your responsibility to read the AT24C256 datasheet on how it works.

The address line is 15 bit long, how to send it? Which byte should i send first MSB or LSB?

Where do you find the 15bit address. The I2C protocol is normally 7bit. Did you read the AT24C256 datasheet? Below is the datasheet screenshot. It clearly says the device address is 7bit which is 10100A1A0.

  The I2C protocol always sends out the MSB first. This is not TMSLS3137 specific. It is a protocol. 

The datasheet tells you how to access the EEprom. You just need to read it. If you want to write to location 0x1000 then you will  first send 0x10 as the first data byte followed by 0x00 as the second data byte. The first and the second data bytes comprise the EEprom word address. The third data byte will be the data value you want to write to location 0x1000. 

I;\'m actually on vacation until next week. I will not be able to respond until next week. For new questions, you actually need to file a new post as there will be someone to answer your new questions. 

Device Addressing

The 128K/256K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Figure 7 on page 11). The device address word consists of a mandatory one, zero sequence for the first five most significant bits as shown. This is common to all two-wire EEPROM devices.

The 128K/256K uses the two device address bits A1, A0 to allow as many as four devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A1 and A0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float.

The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.

Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the device will return to a standby state.

DATA SECURITY: The AT24C128/256 has a hardware data protection scheme that allows the user to write protect the whole memory when the WP pin is at VCC.

Write Operations

BYTE WRITE: A write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device, such as a microcontroller, then must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally-timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 8 on page 11).

PAGE WRITE: The 128K/256K EEPROM is capable of 64-byte page writes.

A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 63 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition (see Figure 9 on page 12).

The data word address lower 6 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 64 data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be overwritten. The address “roll over” during write is from the last byte of the current page to the first byte of the same page.