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What is the maximum TDxCLK clock input on MSP430F51x2?



Some background:

My application requires a very precise input capture.  The high resolution timer on these MSP430F51x2 seemed ideal.  I placed a very stable 10Mhz oscillator (0.28ppm) as the input oscillator and planned on multiplying it to 160MHz using TimerD's High Resolution Clock Generator in regulated mode.  But it turned out (so far) not to work properly, because it seems to get multi-microsecond offsets from the reference clock (even though the "unlock" flag TDHUNLKIFG never gets set).  I presume that this is due to the coarseness in the internal FLL controls.  While measuring bypassing the High Resolution Generator gave readings that only differed by 1 count (at 10MHz), the 160MHz could have measuring differences of 500 or more, defeating the whole purpose of using higher frequency.

So it occurred to me that although the chip only supports up to 25 MHz on most other clock domains (MCLK, SMCLK, ACLK), perhaps I could provide the high frequency clock (e.g. 100 MHz) externally via TDCLK (more specifically, TD0CLK or TD1CLK).  I could not find in the datasheet a maximum value for this port.  Is it possible?

  • Curious to know the answer to this one too.  Also Alex did you use the TDHEAEN bit in TDxHCTL0?

    TDHEAEN = Timer_D high-resolution clock enhanced accuracy enable bit.  Setting this bit reduces the accumulated frequency offset of the high-resolution clock generator and the reference clock.

  • Hi Eric,  

    I tried with TDHEAEN set and cleared, and got similar results.  

    By the way, since _everybody_ would want "enhanced accuracy", the fact that it is optional implies that there must be some kind of trade-off, but unfortunately I haven't found any explanation or discussion about this in the documentation or forums.

  • Alex Arango said:
    _everybody_ would want "enhanced accuracy",

    Enhanced accuracy means increased operating current. Which isn’t what _everybody_ wants.

  • @Jens.  Knowing that it means increased current is great.  By how much?  Where is this documented? That was my point.

  • It is a general truth that increased speed or accuracy also means higher energy consumption.

    However, you’re right, this control bit is nowhere else mentioned, neither in datasheets nor in the TimerD description. And its effect (beyond the info that it reduces the accumulated error) is unknown. Wel, increasing a PLL accuracy is definitely a power-consuming process.
    I would handle it like any other undescribed/reserved bit: Either leave it alone, or do experiments and share the results.

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