Is there backup memory for MSP430FR203x?

Dear Sirs
I can access backup memory successfully on MSP-EXP430FR4133 LauncPad. And same program flash into MSP430FR2033, but always get 0xff value from back memory register. Does MSP430FR203x support backup memory register(0x0660)?
Thanks,
Phil Huang

Dear Phil,

There is indeed backup memory on the MSP430FR2033 device located at 0x0660 and 0x20 bytes in length, just like the MSP430FR4133. Have you tried writing a word to BAKMEMx and can confirm that you are unable to read back the value? Try viewing your memory browser location 660h in the IDE debugger and confirm if the memory is being correctly written to/read from.

Regards,
Ryan

Dear Ryan
I have used memory browser to view the value of BAKMEM0(0x0660) that always show 0x3FFF and others BAKMEM1.2.3...same as value 0x3FFF. But i use MSP-EXP430FR4133 LaunchPad the default value of BAKMEM0,1,2,3 ... are all 0x0000. Is there hardware/power issue?

BR,
Phil Huang

The fact that, without first writing some other value into it, it always shows 0x3FFF does not mean that it is not backup memory.

The fact that, without first writing some other value into it, it always shows 0x0000 does not mean that it is backup memory.

The proper behavior of backup memory should be as follows: when you first write some value into it, go through RAM shutdown any number of times for long periods of intervals, and it still shows the same value you wrote.

Dear Ryan
I post the testing software that i test with each MSP430FR4133 and MSP430FR2033, I can view the data value 0x00 or 0x20 on BAKMEM0_L register with MSP430FR4133 that is correct program flow and backup memory setting. But I always see the value 0xff on BAKMEM0_L register with MSP430FR2033.

BR,
Phil Huang
-----------------------------------------------------

#include <msp430.h>

unsigned char BKM_Data;

void initGpio(void);

int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT

initGpio(); // Configure GPIO

// Initialize XT1 32kHz crystal
P4SEL0 |= BIT1 | BIT2; // set XT1 pin as second function
do
{
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag

// First determine whether we are coming out of an LPMx.5 or a regular RESET.
if (SYSRSTIV == SYSRSTIV_LPM5WU) // When woken up from LPM3.5, reinit
{
// If MCU wakes up from LPM3.5, re-init and then return to LPM3.5 again.

// Restore P1OUT value from backup RAM memory, keep P1OUT after LPMx.5 reset
BKM_Data = BAKMEM0_L;
//BKM_Data = *(unsigned int *)BAK_RAM_BASE;
BKM_Data ^= BIT5;
P2OUT = BKM_Data;
//*(unsigned int *)BAK_RAM_BASE = BKM_Data;
BAKMEM0_L = BKM_Data;
__enable_interrupt(); // The RTC interrupt should trigger now...
}
else
{
// Device powered up from a cold start.
// It configures the device and puts the device into LPM3.5
P2OUT = 0;
// Configure backup memory
//*(unsigned int *)BAK_RAM_BASE = 0;
BAKMEM0_L = 0;
// Configure RTC
// Interrupt and reset happen every 1024/32768 * 32 = 1 sec.
RTCMOD = 32-1;
RTCCTL = RTCSS__XT1CLK | RTCSR |RTCPS__1024;
RTCCTL |= RTCIE;

// Store P1OUT value in backup memory register before enter LPM3.5
BKM_Data = P2OUT;
//*(unsigned int *)BAK_RAM_BASE = BKM_Data;
BAKMEM0_L = BKM_Data;
}

// Enter LPM3.5 mode with interrupts enabled. Note that this operation does
// not return. The LPM3.5 will exit through a RESET event, resulting in a
// re-start of the code.
PMMCTL0_H = PMMPW_H; // Open PMM Registers for write
PMMCTL0_L |= PMMREGOFF; // and set PMMREGOFF
__bis_SR_register(LPM3_bits | GIE);
__no_operation();

return 0;
}

void initGpio(void)
{
P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF; P4DIR = 0xFF;
P5DIR = 0xFF; P6DIR = 0xFF; P7DIR = 0xFF; P8DIR = 0xFF;
P1REN = 0xFF; P2REN = 0xFF; P3REN = 0xFF; P4REN = 0xFF;
P5REN = 0xFF; P6REN = 0xFF; P7REN = 0xFF; P8REN = 0xFF;
P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00;
P5OUT = 0x00; P6OUT = 0x00; P7OUT = 0x00; P8OUT = 0x00;

// Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = RTC_VECTOR
__interrupt void RTC_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(RTC_VECTOR))) RTC_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(RTCIV, RTCIV_RTCIF))
{
case RTCIV_NONE : break; // No interrupt pending
case RTCIV_RTCIF: // RTC Overflow
// Toggle LED on P1.0
//P2OUT ^= (BIT5);

// Store P1OUT value in backup memory register
//BKM_Data = P2OUT;
//*(unsigned int *)BAK_RAM_BASE = BKM_Data;
__bic_SR_register_on_exit(LPM3_bits); // Exit LPM3
break;
default: break;
}
}

Hello Phil,

I am going to try and replicate your issue on my end but first I have to request some MSP430FR2033 samples as I do not have any around the office. Have you tried using any other FR2033 devices to see if the issue exists on multiples MCUs? What revision number is the device you are currently using?

Regards,
Ryan

Dear Ryan
I have test 2pcs MSP430FR2033 and Boths have same problem. The version number is "FR2033 4BAFPT B".
Best regards,
Phil Huang

Hi Ryan,

I have a slightly off the topic question.

I can see why on a Flash device one might need BAKMEM, but for FRAM device, why bother to have and to use BAKMEM? Isn't FRAM non-volatile and easy to use?

I have often seen "Erase the FRAM" and "Flash the FRAM". Do we need to emulate Flash with FRAM?

-- OCY

Hi OCY,

The difference between FRAM and backup memory is that the latter is retained during LPM3.5.

I don't completely understand your second question.  Some projects are using our MSP430 FRAM devices to replace external EEPROMs/flash devices but FRAM technology holds several advantages over flash (lower power, faster writes, greater write endurance, etc).

Regards,

Ryan

Phil,

I have been able to replicate your issue on my end and am currently investigating to find a root cause.

Regards,
Ryan

Hi Ryan
I see. Thank you for your help.

BR,
Phil Huang