Other Parts Discussed in Thread: MSP430FR2433, MSP430WARE
USCI_B0 initialized as I2C master. Port pins have been configured for I2C peripheral and external pullups have been installed. Configured to use auto stop. The associated ISR has been set up to write data to the transmit buffer. The following sequence is being used:
Assert UCSWRST.
Set UCB0TBCNT to number of data bytes to transmit.
Set slave address
deassert UCSWRST
Set UCTR and UCB0STT to initiate the transaction.
I have a logic analyzer attached to the bus. Nothing else. The analyzer is set up to trigger on the falling edge of SDA. I would expect to see the start followed by the slave address and R/W low and then the transaction to end due to slave NACK. There is no recorded activity.
I have put a breakpoint in the code to be able to view the register contents after the attempted transmission. There is no bus busy asserted to impede the transaction. All of the configuration register contents reflect the setup and UCTXSTT is set. UCTXIFG is not set.
What am I missing to start the transmission?
