I've noticed that in most of the I2C example code I've looked at (see below) that the function TI_USCI_I2C_notready() is called to wait before either transmitting or receiving on the i2c bus. Every time its called within a while loop, like this:
while ( TI_USCI_I2C_notready() ); // wait for bus to be free
So, this means that if the UCBBUSY bit ever gets stuck high, the code will be forever stuck in this while loop. I figured it would be good code practice to provide an out.
My question is, is that why the UCNACKIE interrupt is enabled each time before a TX or RX? If so, how is that interrupt handled? None of the example code shows any reference to an ISR for this particular case.
Any info would be great,
Thanks!
http://www.ti.com/mcu/docs/litabsmultiplefilelist.tsp?sectionId=96&tabId=1502&literatureNumber=slaa382&docCategoryId=1&familyId=342