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SD16_A on MSP430F47197

Other Parts Discussed in Thread: MSP430F47197

I have been using the SD16_A on the MSP430F47197 for a load cell application. I have been using a front end like the one found in the attached image. However, I have noticed that the signal takes quite a few samples to settle and shows a slow, RC-like response while settling. I am using the SD16_A with OSR=1024 and continuous grouped samples throwing away the first four conversions. Is there a limit on the values of the RC anti-alias low pass filter directly in front of the converter? I am using 1kohm and 0.1uF for the RC filter. Is this a problem considering that the SD16_A is not buffered? I am also using an external reference fed from the load cell supply through a resistor divider. Is there any limit on the input resistance of the reference voltage? Is this also a switched capacitor input? Also, I am using the same op amp as in the schematic (ADA4528-1). Any suggestions as to what may be causing this settling/drift would be greatly appreciated.

Many thanks!

  • You should take a look at how a delta-sigma converter works.
    Basically, it is a comparator and an integrator. On each clock, the current input value is added to the integrator and the result is compared to the reference. The comparison result gives an output bit. It also define swhether on next integration/comparison step, the reference is subtracted form teh input signal or not.
    So anfter an infinite number of conversions, the number of '0' and '1' bits directly represents the input value.
    Now you don't have infinite time. So the bits are streamed into a digital filter and after OSR bits, the filter will output a value. The higher the OSR, the higher the precision of the result. THis is also why you have to clear the history of the digital filter when changing the channel (and it takes four conversions to fill it again)

    So the digital filter already works as a filter, but also produces some aliasing result itself (see the users guide). You don't need an external anti-aliasing filter as the conversion is already filtered by the oversampling.

    The unbuffered SD16A input means that the input impedance is rather low, which needs ot be considered when calculating the error. However, in the schematic, the signal is buffered by the OpAmp and therefore has a low impedance itself - far lower than the SD16 input impedance. The reference part, however, has no such buffering. But since it is directly connected to 5V/GND, it doesn't matter.

    Keep in mind that the SD16, except on the AFE devices for energy metering, does not accept negative values. You do have a positive and negative input and the two are subtracted from each other, but both have to be positive towards Vss. However, in teh schematics, bit, OUT+and OUT-, are positive anyway.
    Also don't forget that the SD16 has an input range of 1.2V whiel the schematics seems to work with 5V signals. You'll need a voltage divider for the inputs. Or you have to externally subtract OUT- from OUT+ before you feed it to the SD16 (assuming that the difference is positive and <1.2V)

  • Thanks you for the detailed reply Jens-Michael.

     

    I have confirmed that my system meets all of the requirements you detailed above. Despite there being an op amp buffering the source sensor, the RC filter after the op amp presents an impedance to the SD16. Does this place requirements on the maximum/minimum values of the resistor and capacitor in the low pass passive filter directly in front of the SD16? Also, in my configuration, there is a resistor divider directly in front of the Vref. Are there requirements on the maximum resistances used in this bridge since the Vref is unbuffered? Doesn't this divider present an impedance to the Vref pin? Also, should there be an external capacitance on the Vref pin when using an external reference?

    I am still seeing the settling of the signal on the channels. The settling is about 5-10 LSB's and rises or falls exponentially. I have tried shorting the channels or using the internal short for the SD16 and the problem disappears. I am confident it is a gain error and not an offset effect. When  I use the Vcc channel on the SD16, the rise is also apparent. To me, this seems to indicate that the 3V is rising or that the Vref is rising. However, I cannot understand what could be causing this settling/rising period. I need a consistent, settled signal within a few 100ms, and my signal experiences an exponential rise over a period of 20-30 seconds or more. Please let me know your thoughts.

    Many thanks!

  • You don't need this RC filter after the OpAmp. Just throw it away.

    The SDs input impedance is in the datasheet. If oyu have a high-impedance resistor divider on teh unbuffered reference, then of course the SD16 input impedance changes the divider ratio. You can compensate for it by chosing a larger 'botoom' resistor in teh divider. However, typical resistor tlerance is already affecting the precision, in most cases to a much bigger extent.

    Core Centon said:
    my signal experiences an exponential rise over a period of 20-30 seconds or more

    That's unusual and rather looks like a thermal drift. The SD should have settled a few ms after switching the channels.

    I have not much personal experience with the SD16. THe only thing I've done yet with it is the LaunchPad Scope project (I ported the PC software it to VC++ and improved it a bit) and there any change of the input voltage was pretty closely followed by a change in the scope display. I never checked precision or such. But there was no noticeable settling time, even though the signal source was ~ 30k impedance.

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