Hello,
I’m beginner in msp 430 families.
I’m write code to msp430f5439A, my IDE is code composer 5.2 (compiler version 4.1), and I write in C.
Whilst I’m learning about that new processor and environment, questions were rises up.
- in the file “msp430f5438a.h” I saw those lines:
------
#ifdef __ASM_HEADER__ /* Begin #defines for assembler */
#define WDT_VECTOR ".int58" /* 0xFFF4 Watchdog Timer */
#else
#define WDT_VECTOR (58 * 1u) /* 0xFFF4 Watchdog Timer */
-----
how the compiler can understand the value of “(58 * 1u)” as an address of 0xFFF4? At first I thought that maybe the compiler is not ANCI C. but, and I want to quote (slau132g.pdf) “The compiler supports the 1989 version of the C language and the 1998 version of the C++ language….based on the ISO C standard”, (and I did not find any exception that can clarify the question).
- In order to understand how the CSL (chip select library, given by CCs v5.2) map identifier to be register in a certain address I following the register name and found those lines:
************************************************************
* WATCHDOG TIMER A
************************************************************/
#define __MSP430_HAS_WDT_A__ /* Definition to show that Module is available */
#define __MSP430_BASEADDRESS_WDT_A__ 0x0150
SFR_16BIT(WDTCTL); /* Watchdog Timer Control */
SFR_8BIT(WDTCTL_L); /* Watchdog Timer Control */
SFR_8BIT(WDTCTL_H); /* Watchdog Timer Control */
************************************************************/
And later:
#define SFR_16BIT(address) extern volatile unsigned int address
So it clear that WDTCL is address register. But:
a. How that register was map to any address by the define “__MSP430_BASEADDRESS_WDT_A__ “ ?
b. And why that address that according to the Literature (slas655b.pdf) : Watchdog Registers (Base Address: 015Ch) is map to 0x0150?
I look at the Errate (SLAZ057P) but there was no relating information.
Is there anyone have hint how to solve that enigma…?
Thanks.