how to calculate mips for msp430F

venkatesh Gudise said:

i had connected few devices on 10 ADC channels, 7-I2C and 3 SPI.

You need ADC with more than 10 inputs and at least two USCI peripherals, one for SPI and another for I2C. As you don't specify other requirements, you have to finish selection yourself using Product parametric search.

thank u  Ilmars.

 can u help me regarding MIPS. i've no idea what is MIPS and how to calculate it. 

regards,

Venkatesh.

venkatesh Gudise said:

 can u help me regarding MIPS. i've no idea what is MIPS and how to calculate it. 

msp430 instructions execute in 1 .. 6 CPU cycles. MIPS is CPU frequency in MHz divided by average cycle count of your code. If you are not fine with assumption and need exact figure then you better measure MIPS rather than try to calculate it :)

hello Ilmars,

Ilmars said:

msp430 instructions execute in 1 .. 6 CPU cycles. MIPS is CPU frequency in MHz divided by average cycle count of your code. If you are not fine with assumption and need exact figure then you better measure MIPS rather than try to calculate it :)

sorry for disturbing you again. how can i know average count of my code. please pardon as i'm very new to this terminology.

venkatesh Gudise said:

sorry for disturbing you again. how can i know average count of my code

Look CPU instructions in disassembly. Some debuggers are showing cycle count of instructions. If you are using debugger which does not count cycles, then you shall read documentation of CPU to find how many cycles each instruction takes. Counting cycles is daunting task.

venkatesh Gudise said:

please pardon as i'm very new to this terminology.

Maybe you shall start with explanation - why you are asking this? How exact MIPS figure (precision) you are looking for?

MIPS is a rather worthless value. They can only be used to compare processors of the same architecture - or for marketing, to fool people by pushing a poor processor with high MIPS values while it doesn't do much with these executed instructions.
A SPARC CPU executes one instruction per CPU clock. So 1 MIPS @1MHz for this machine. However, one instruction doesn’t do much. It can either load (half of) a value into a register or write a register or add two registers (for which it has to load both operands first) etc. So an addition of two values takes 6 instructions.
On MSP, the same job may take 6 MCLK cycles. So 0.166MIPS @1MHz. But the same number of additions is done per second on both CPUs.

Imagine what happens if you have a single instruction that does a complete CRC calculation over a number of bytes in memory. You’d perhaps have just 0.01MIPS then, but a different CPU would need to have 100MIPS to do the same job in the same time with a code loop.

Jens-Michael Gross said:

They can only be used to compare processors

Exactly. That's the point. To get generic understanding of how many instructions (not necessarily math operations) CPU can do per clock cycle.

Jens-Michael Gross said:

compare processors of the same architecture

Just curious: why it's correct to compare MIPS performance for CPU's of the same architecture only?

Jens-Michael Gross said:

A much better way would be to calculate Dhrystones (a certain integer math algorithm) in DMIPS.

For scientist - maybe. I would be very careful talking about Dhrystones in forum of small embedded microcontrollers which often happen to run code does not containing even single multiplication or division instruction.

Same architecture because of this: A SPARC processor requires 6 instructions to move an immediate value to a memory location, each taking one CPU cycle. The MSP requires one, taking 6 CPU cycles. So when running at the same clock speed, both require the same time for the task, but the SPARC will account for 6 times as many MIPS.

Dhrystones measure the integer math speed of a CPU/Compiler combo. Which is way closer to reality. Of course if the application requires no integer math, it won’t help.

 I agree, that the other basic Benchmark, the Whetstones, indeed is mostly for scientists, as it measures floating point performance. And at the times it was invented, people didn't (ab)use float and double variables for counting loops - they only used them (or the corresponding types for other languages) when absolutely necessary (as one should do for Microcontrolelrs too). And with a HW FPU you're king, even if the code doesn't use it at all.  So the test was of useless for anything than comparing raw mathematical calculation power. This is why Dhrystones were introduced (and the name was an intentional pun).
But after all, almost everything relies on integer math of some kind, even printf. :)