what is UC0CLK in MSP430G2553 (USCI_A0) UART mode ?where is UC0CLK clock generated from?

P1.4 UCA0CLK/ [USCI_A0 clock input/output]

When UCMST = 0, the USCI clock is provided on the UCxCLK pin by the master,
the bit clock generator is not used, and the UCSSELx bits are don’t care.

But as UART is a clock-less transfer, using an external clk source is not used very often would guess.

Not often, indeed. But sometimes it is, when you have a system-wide clock that matches the baudrate better (especially at higher baudrates) than the available system clock. Some USB/SER converters have a clock output that you can use directly this way. (it allows PC-controlled baudrate and the MSP doesn't even need to know as long as the CPU is fast enough)
And I've even seen some peripherals which combine UART and SPI in a way that they send data UART-like but provide a clock when they do or are ready to receive.
Well, since the clock input is required for SPI slave functionality anyway, why not providing it for UART operation too. It's the same baudrate generator for both.