RTC_C configuration of Interrupts in MSP430F6779

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//******************************************************************************
//  MSP430F67791A Demo - LFXT1 Oscillator Fault Detection
//
//  Description: System runs normally in LPM3 with basic timer clocked by
//  32kHz ACLK with a 1 second interrupt. P1.0 is normally toggled every
//  1 second inside basic timer interrupt. If an LFXT1 oscillator fault occurs,
//  NMI is requested forcing exit from LPM3. P1.0 is toggled rapidly by
//  software as long as LFXT1 oscillator fault is present. Assumed only
//  LFXT1 as NMI source - code does not check for other NMI sources.
//  ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
//  //* An external watch crystal between XIN & XOUT is required for ACLK *//
//
//
//           MSP430F67791A
//         -----------------
//    /|\ |              XIN|-
//     |  |                 | 32kHz
//     ---|RST          XOUT|-
//        |                 |
//        |             P1.0|-->LED
//
//   E. Chen
//   Texas Instruments Inc.
//   January 2014
//   Built with CCS Version: 5.5.0 and IAR Embedded Workbench Version: 5.52
//******************************************************************************
#include <msp430.h>

void main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

    // Setup P1.0 output
    P1DIR |= BIT0;                          // Set P1.0 to output direction
    P1OUT &= ~BIT0;                         // Clear P1.0

    // Set up XT1
    UCSCTL6 &= ~(XT1OFF);                   // XT1 On
    UCSCTL6 |= XCAP_3;                      // Internal load cap

    // Setup RTC
    RTCCTL0_H = RTCKEY_H;                   // Unlock RTC_C module
    RTCCTL1 = RTCTEV_3;                     // Time event every day at noon
    RTCPS0CTL = RT0IP_7;                    // Set RT0IP to /256
    RTCPS1CTL = RT1IP_6 | RT1PSIE;          // Set RT1IP to /4
                                            // Enable RT1PS interrupt

    // Setup SFR
    SFRIE1 = OFIE;                          // Enable oscillator fault interrupt

    __bis_SR_register(LPM3_bits | GIE);     // Enter LPM3 w/ interrupts
    __no_operation();                       // For debugger
}

// RTC Interrupt Service Routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=RTC_VECTOR
__interrupt void RTC_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(RTC_VECTOR))) RTC_ISR (void)
#else
#error Compiler not supported!
#endif
{
    P1OUT ^= 0x01;                          // Toggle P1.0
    RTCCTL0 &= ~RTCTEVIFG;
    RTCPS1CTL &= ~RT1PSIFG;
}

// UNMI Interrupt Service Routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=UNMI_VECTOR
__interrupt void UNMI_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(UNMI_VECTOR))) UNMI_ISR (void)
#else
#error Compiler not supported!
#endif
{
    // Loop until XT1 & DCO fault flag is cleared
    do
    {
        UCSCTL7 &= ~(XT1LFOFFG | DCOFFG);   // Clear XT1 & DCO fault flags
        SFRIFG1 &= ~OFIFG;                  // Clear OSC Fault flag
        __delay_cycles(0xFFFF);             // Time for flag to set
        P1OUT ^= BIT0;                      // Toggle P1.0
    } while (SFRIFG1 & OFIFG);              // Test oscillator fault flag
}