I am using Tom Baugh's MSP430F2274 board and software in a class. We are also using IAR Kickstart.
In his second lab exercise, BetterNextProject, we see various timing interrupt methods and LPM3 to reduce the number of cycles and power consumed. Each time the LED output, P1.0, toggles due to a timer firing its interrupt, the SMCLK can be seen making a burst of 28 cycles of running in active mode. Analyzing the disassembly code and reading the Family User's Guide (slau144j) and MSP430 Family Mixed-Signal Microcontroller Application Reports (slaa024), I can only account for 26 cycles.
Here are the details:
Action/Instruction (in execution order) Cycles (from Tables 3-14 & 16 in the Family User's Guide)
Interrupt Accepted 8 // 6 from Table 3-14 plus 2 from last sentence of slaa024 since //interrupted in LPM3. This includes the long cycle of SMCLK which //ends with the falling edge of a long period of it idling high.
008094 bic.w #0xF0, 0x0(SP) 5 // First line of WatchdogTimer_ISR. All low-power modes cleared.
00809A reti 5
008050 xor.b #0x1,&P1OUT 4 // Constant Generator register source to absolute destination.
// This toggles the LED.
008054 jmp 0x804C 2 // End of While Loop.
00804C bis.w #0xD8,SR 2 // Beginning of While Loop. Start LPM3. Instruction immediately
___ //before the XOR.
Total 26 cycles
When I monitor SMCLK on P2.1 on an oscilloscope, it idles high and has 28 falling edges. Modifying the code by inserting LED-toggling eXclusive ORs wherever possible to isolate the actions/instructions, the extra two cycles come after the BIt Set instruction that starts LPM3.
While testing, I commented out the BIt Clear instruction that clears all low power modes while retaining the inserted eXclusive ORs. It then shows the RETI is only 4 cycles long.
So, what is happening?
Thanks,
Emmett Redd
