Re-enabling NMI inside the ISR

Nick Alexeev

Colleagues,

I've got to a point where the MSP430 can sleep in LPM4 and wake-up on NMI interrupt. I had a tough time figuring that out. As they say: “You find it in the last place that you look.” The line of code that was missing was re-enabling of the NMI in the ISR, similar to this snippet:

#pragma vector=NMI_VECTOR
__interrupt void nmi_isr(void) {
	volatile unsigned int i;
	P1OUT &= ~0x04;                           // P1.2 LED on
	for (i = 20000; i > 0; i--);              // Delay
	P1OUT |=  0x04;                           // P1.2 LED off
	IFG1 &= ~NMIIFG;                          // Reclear NMI flag in case bounce
	IE1 |= NMIIE;                             // Enable NMI
}

// This code snippet comes from msp430g2xx3_nmi.c in slac485f

Why re-enable NMI in the last line? Does every interrupt has to be re-enabled in a similar fashion at the end of the ISR? Probably, I'm not the first person with a question like this. Is there an application note covering this area?

Any suggestion, insight or reference is really appreciated!

Cheers,
- Nick

over 10 years ago

0 old_cow_yellow over 10 years ago

Guru 58965 points

The NMIIE bit in IE1 is automatically cleared when the NMI is granted and the NMI-ISR is entered. This prevents the NMI-ISR from being entered again. When NMI-ISR is finished, there is no automatic mechanism to enable NMIIE, thus the NMI-ISR itself needs to enable it at the very end.

For interrupts that can be masked by GIE are different. The GIE bit is pushed on the stack and then automatically cleared. The corresponding IE bit is not cleared because GIE=0 already protects the ISR from being entered again. When the ISR is finished, the old GIE is popped from the stack and automatically restored. Thus the ISR need not do it explicitly.

Hope this explanation make sense to you. I cross my fingers.

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Re-enabling NMI inside the ISR