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Configue unused pins

Su Jin
Intellectual 740 points

 

My project uses only a few pins of  a MSP432P401R microcontroller:

P1.2 and P1.3 for UART Mode comunication,

P1.6, P1.7 for I2C,

P2.0, P2.1, P2.2, P2.3, P2.4, P2.5 for LCD,

P3.0 for a button and

P3.1 for a buzzer.

 

So there are still a lot pins unused, which must be configurated according to 

P. 485, 10.3.2 Configuration of Unused Port Pins, MSP432P$XX_Family_Guide.pdf:

 

To prevent a floating input and to reduce power consumption, unused I/O pins should be configured as I/O function, output direction, and left unconnected on the PC board. The value of the PxOUT bit is don't care, because the pin is unconnected. Alternatively, the integrated pullup or pulldown resistor can be enabled by setting the PxREN bit of the unused pin to prevent a floating input.

 

Obviously the job for port 1 to port 10 is easy to do, but I do not know how to do port PJ as the guidance is not clear:

 

NOTE: Configuring port PJ and shared JTAG pins:

The application should make sure that port PJ is configured properly to prevent a floating input. Some pins of port PJ are shared with the JTAG TDI and TDO functions, and get initialized to the JTAG functionality on reset. Other pins of Port J are initialized to highimpedance inputs by default.

 

Please help and thank you in advance.

 

Below is my configuration of unused pins of port 1 to port 10, would you please take a look and tell me if it is correct.

 

Also the code is based on that all the pins have internal pull up/down, is it true?

    P1DIR |= BIT0+BIT1+BIT4+BIT5;   //set pins p1.0,p1.1,p1.4 and p1.5 to output direction
    P1REN |= BIT0+BIT1+BIT4+BIT5;   //enable pullup resistor for each unused pin
    P2DIR |= BIT6+BIT7;
    P2REN |= BIT6+BIT7;
    P3DIR |= 0xF3;
    P3REN |= 0xF3;
	P4DIR=0xFF;              	
	P4REN=0xFF;              	 
	P5DIR=0xFF;
	P5REN=0xFF;
	P6DIR=0xFF;
	P6REN=0xFF;
	P7DIR=0xFF;
	P7REN=0xFF;
	P8DIR=0xFF;
	P8REN=0xFF;
	P9DIR=0xFF;
	P9REN=0xFF;
	P10DIR=0x1F;
	P10REN=0x1F;

Thank you very much.

 

Merry Christmas and Happy New Year!

 

Sincerely

 

Su

  • 0
    Guru 58965 points
    The documents are "preliminary" and not complete. But the principles are correct.

    When they do not know what an I/O pin is going to be connected to, after power-up or Reset, they configure it as "general purpose digital input with high input impedance". Doing so is "save" (will not result in I/O contention). But may wast power if that pin is not connected to anything and start to oscillate.

    Since you know what each pin is connected to, you can configure the un-connected I/O to avoid the power wasting oscillations. You could either (a) make it a "general purpose digital output pin", or (b) make it a "general purpose digital input pin with internal pull-up/down resistor". But making it an output pin and enable the internal resistor is probably not prudent.

    The same principles apply to Port J. It is not clear but sounds like, after power-up or Reset, J.4 and J.5 are configure as JTAG pins while J.0, J.1, J.2 and J.3 are configured as "general purpose digital input with high input impedance".
  • 0 in reply to old_cow_yellow
    Intellectual 740 points
    Thank you very much, I may misunderstand the guide . But which is better, (a) or (b)?
  • 0 in reply to Su Jin
    Guru 58965 points
    I think (a) with output low may help to reduce RF interference. But if that pin is actually connected to a high, you may damage that pin. In that case, (b) is safer.
  • 0 in reply to old_cow_yellow
    Intellectual 740 points
    What do you mean by actually connected to a high, internally or externally?
  • 0 in reply to Su Jin
    Guru 58965 points
    Sorry.

    What I meant was, if the pin is connected to an external active high/low and you, by mistake, configure that pin as output low/high (respectively); hardware could be damaged.
  • 0 in reply to old_cow_yellow
    Intellectual 740 points
    I think I understand it pretty well now, and I plan to apply (b) make each unused pin a "general purpose digital input pin with internal pull-up/down resistor" for my project.

    If I may I'd like to ask some more questions about it because I know almost nothing about hardware. The questions are:

    Is the internal pull-up/down resistor in the chip package?
    How many are there in total?
    Is it available to every pin?

    I really appreciate your help.
  • 0 in reply to Su Jin
    Guru 58965 points

    Su Jin said:
    Is the internal pull-up/down resistor in the chip package?

    Yes. Not only in the package, actually on the die.

    Su Jin said:
    How many are there in total?

    Not sure, I think every port pin has one, total about 84?

  • 0 in reply to old_cow_yellow
    Intellectual 740 points
    Thank you very much.

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