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MSP432 GPIO Toggle Rate

Zed
Prodigy 20 points


Hello,

I was trying to generate high-speed pulses using MSP432 through GPIO pins. I increased the DCO frequency to 48 MHz.

But I can only achieve 3 MHz toggling rate.

This is the code, I appreciate your help:

    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT



    /* Step 3: Configure DCO to 48MHz, ensure MCLK uses DCO as source*/

    CSKEY = CSKEY_VAL;                        // Unlock CS module for register access

    CSCTL0 = 0;                            // Reset tuning parameters

    CSCTL0 = DCORSEL_5;                    // Set DCO to 48MHz

    /* Select MCLK = DCO, no divider */

    CSCTL1 = CSCTL1 & ~(SELM_M | DIVM_M) | SELM_3;

    CSKEY = 0;                             // Lock CS module from unintended accesses

    // The following code toggles P1.0 port

    P1DIR |= BIT0;                      // Configure P1.0 as output

    while(1)

    {

    	P1OUT &= ~BIT0;

    	P1OUT |= BIT0;

    }

Thanks, 

  • 0
    TI__Mastermind 25045 points

    Hello Zed,

    Zed said:
    I was trying to generate high-speed pulses using MSP432 through GPIO pins

    What is the speed that you are trying to achieve?? At the same time I noticed that you are not configuring flash wait cycles, so this will reduce you pulse speed unless that you run your code from RAM.

    Anyway, there are some other options to generate high speed pulses. For example you can output the SMCLK or MCLK or the HSCLK to a GPIO, or you can have PWM output (thru a timer).

      What I would like to understand is, what is the purpose of these high speed pulses? Knowing this, I may be able to point to the right solution.

        Regards,

         David

  • 0 in reply to DavidL
    Prodigy 20 points

    Hello David,

    Thank you for your kind response.

    I tried to configure the flash wait cycles exactly as the examples of the MSP432 but not much different.

    What is the reason of this limitation ? Does the GPIO operate at different clock domain ?

    In the code above I was trying to understand why the toggling is slow. it is not what I am trying to achieve.

    I am trying to generate high speed pulses that would represent encoded data. See the following photo please:

    This photo is generated by using ModelSim in Verilog.

    Now, I was trying to generate the same signal but I still face sometime shifting (sometimes the signal is extended > 0.5 us) and sometimes the zero is extended for more than > 7.5 us ( a case was 9 us).

    I tried using the timer output but still facing the drift issue.

    I appreciate your help.

    Thanks.

  • 0 in reply to Zed
    Mastermind 9125 points

    Hi Zed,

    Please check the output assembly file. The instruction "P1OUT &= ~BIT0" will need couple of instruction cycles to complete. And then "P1OUT |= BIT0" need other few cycles to complete. So, you get a low toggling speed. The required instructions are:

    1. Load P1OUT to a register

    2. And the register with ~BIT0

    3. Save the register to P1OUT

    4. Load P1OUT to a register

    5. Or the register with BIT0

    6. Save the register to P1OUT

    7. Jump back to loop-start-address

    In average,  48/3 = 16, totally 16 cycles are required.

    The P1OUT should be already declared by "volatile" so that it needs to be reloaded every time. You can improve it by using register to preset values.

    register int P0 = P1OUT & ~BIT0;
register int P1 = P1OUT | BIT0;
while(1){
    P1OUT = P0;
    P1OUT = P1;
}

  • 0 in reply to Robert Chen
    Guru 34773 points

    Just to add to rcfocus comment, for complete answer, that DMA can be used also for high speed port toggling. Complete pattern for P1OUT can be stored in memory, and than each byte from memory can be copied to P1OUT by DMA. Don't know about MSP432, but MSP430 can do this with MCLK / 2 frequency. My logic analyzer working on this way, but with opposite direction, PORT > RAM.

    http://forum.43oh.com/topic/3909-msp430f550x-based-logic-analyzer/?p=65839

  • 0 in reply to Robert Chen
    Guru 74080 points

    rcfocus said:
    In average,  48/3 = 16, totally 16 cycles are required.

    Zed said:
    I increased the DCO frequency to 48 MHz. But I can only achieve 3 MHz toggling rate.

    48MHz / 16 = 3MHz

  • 0 in reply to Dennis Eichmann
    TI__Mastermind 25045 points
    Hello,

    I'm closing this thread due to inactivity, but please post back if you still need further clarification.

    Regards,

    David

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