What JTAG connections are used for the MSP430F5131?

Doug Lochner

The familiar diagram from SLAU278 shows JTAG connections for the MSP-FET430UIF, but signal names on the -F5131 datasheet don't quite match

in that PJ.0 is "TDO, PJ1 is "TDI/TCLK" and PJ.3 is "TCK". so how is the -UIF pin 1 (TTO/TDI) connected, and which -F5131 pin gets the TCK ?

Clips of the diagram and datasheet pinout follow -

thanks

from the -F5131 datasheet: - TDO and TDI are on separate pins, and 2 pins are id'd as Clocks

over 8 years ago

0 Lukas Badura over 8 years ago

TI__Expert 4695 points

Hi Dough,

Please have a look on this picture:

Does this answer your question?

Lukas

0 Doug Lochner over 8 years ago in reply to Lukas Badura

Intellectual 300 points

Lukas,

thanks for the drawing;. But since on the Jtag bits are multiplexed with other signals, would connection to its Test pin also be needed ?

Doug

0 Lukas Badura over 8 years ago in reply to Doug Lochner

TI__Expert 4695 points

Hi Doug,

I'm not sure if I've got your point.
Do you mean the TEST/SBWTCK pin of the F5131?

BR
Lukas

0 Doug Lochner over 8 years ago in reply to Lukas Badura

Intellectual 300 points

Yes - does pin 8 of the tool's 14-pin connector need to drive the Test/SBWTCK pin on the -5131 to put the PJ.xx pins into JTAG mode?

0 Lukas Badura over 8 years ago in reply to Doug Lochner

TI__Expert 4695 points

Hi Dough,

Here what I've found in the F5xx UG, page 70:

I hope this helps to answer your question.

Lukas

0 Doug Lochner over 8 years ago in reply to Lukas Badura

Intellectual 300 points

Thanks, Lukas,

the phrase "special sequences on TEST and RST/NMI pins" sounds like I need connections to them along with the JTAG pins.

I'm being cautious here because I've been using the 2-wire "SBW" connection but have gotten locked out of a few chips in the process: CCSv5 and the -FET430UIF "can't connect to the device" during a code load debug session, so I am looking at JTAG as an alternative

Doug

0 old_cow_yellow over 8 years ago in reply to Doug Lochner

Guru 58965 points

"special sequences on TEST and RST/NMI pins" is for invoking BSL
For 4-wire JTAG, the TEST pin on the MSP chip needs to be driven high.
For SBW JTAG, the TEST pin on the MSP chip will be pulled down internally.

0 Doug Lochner over 8 years ago in reply to old_cow_yellow

Intellectual 300 points

Thanks for the clarification - I'll hook it up and move forward!

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What JTAG connections are used for the MSP430F5131?