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MSP430FR5959 strange behavior at 16 MHz connected to debugger

Other Parts Discussed in Thread: MSP430FR5959, MSP430FR5949

I have some very odd behavior while trying to debug my program on an MSP430FR5959. I'm using the MSP430FR595x (HFXT Only) variant with a 16 MHz oscillator. When I try and debug the program the debugger will randomly stop at a different instruction. I cannot just let the debugger run even when I have no break points set.

In trying to debug this issue I've set the processor to use the DCOCLK also set at 16 MHz and I still have the same random jumping debugger issue. If I set the DCOCLK to 24 MHz and set DIVM__2 so that the processor is running at 12 Mhz (24 MHz / 2) then the debugger runs fine. I initially had the FRAM wait states set to NWAITS_1 but even setting it to NWAITS_7 did not seem to help when running at 16 MHz. SMCLK seems to be ok running off the 16 MHz HFXT and I've verified that SMCLK is actually running at 16 MHz by probing the SMCLK P3.4 output with a scope probe. I am sure that this is not a stack overflow or undefined interrupt problem as this code works fine on an MSP430FR5949.

Here is my code for both HFXT and DCO operation:

	// Failing Code
//	CSCTL0_H = 0xA5;					/* CSKEY unlock for clock control register access */
//	CSCTL4 = HFFREQ_2 | HFXTBYPASS | VLOOFF | LFXTOFF | LFXTDRIVE_0 | HFXTDRIVE_0;
//	CSCTL1 = DCORSEL | DCOFSEL_4;		/* Set DCO frequency to 16Mhz */
//	CSCTL2 = SELA__VLOCLK | SELS__HFXTCLK | SELM__HFXTCLK;
//	CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;

	// Ok Code
	CSCTL0_H = 0xA5;					/* CSKEY unlock for clock control register access */
	CSCTL4 = HFFREQ_2 | HFXTBYPASS | VLOOFF | LFXTOFF | LFXTDRIVE_0 | HFXTDRIVE_0;
	CSCTL1 = DCORSEL | DCOFSEL_4 | DCOFSEL_2;		/* Set DCO frequency to 24Mhz */
	CSCTL2 = SELA__VLOCLK | SELS__HFXTCLK | SELM__DCOCLK;
	CSCTL3 = DIVA__1 | DIVS__1 | DIVM__2;

	/* Test the oscillator fault flag */
	do {
		CSCTL5 &= ~(HFXTOFFG);			/* Clear XT fault flags */
		SFRIFG1 &= ~OFIFG;
	} while(SFRIFG1 & OFIFG);

The part number for the oscillator is ASTX-H11-16.000MHZ-T

Can anyone give me any tips to help me solve this problem?

  • Hi thndrwrks,

    Thanks for posting and providing so much detailed information - it really helped me to quickly see where the root cause lies.

    Your problem is that you are overclocking the device. MCLK is the CPU clock and is only spec'd for maximum 16MHz even with FRAM wait-states set. Please see the datasheet www.ti.com/.../msp430fr5959 section 5.3 Recommended Operating Conditions. fSystem (max MCLK frequency) allowed is 16MHz - the 16MHz in this case is what the CPU can handle (not just FRAM wait-states, which is why increasing those even more than the minimum 1 required when running at 16MHz did not help). Therefore, I think if you simply change your MCLK to run at 16MHz instead of 24, you'll see your strange behavior go away - this also explains why things seemed to work when you did /2 on the MCLK.

    I hope this helps clear things up!

    Regards,
    Katie
  • Hi thndrwrks,

    Did this resolve your issue, or is more help still needed?

    Regards,
    Katie
  • I'm going to close the thread, but you can always reply back if you need more help.

    Regards,
    Katie

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