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MSP430FR5969: Handle Multiple ADC channels using DMA

Maisie Fernandes
Intellectual 380 points

Part Number: MSP430FR5969

Hello ,

I want to use 4 ADC channels of the MSP430FR5969 to continuously compute the RMS of a sine wave.

I would like to know if I can use DMA to handle these 4 channels. If possible then how do I read these channels sequentially using DMA.

Thanks & Regards,

Maisie

  • 0
    TI__Guru**** 223617 points
    Hello Maisie,

    You can use ADC sequence-of-channels mode and the ADC12IFG to trigger DMA transfers. But due to errata ADC43, the DMA will be triggered at the end of every ADC conversion instead of at the end of a sequence of channels. There are further difficulties since each conversion is stored in a different address of memory, ADC12MEM0 through ADC12MEM3, and you only have 3 DMA channels to work with. You could increment the source address to compensate but this will require a DMA transfer size of 4 before having to interrupt and change the destination address. This issue is also discussed in this similar thread: e2e.ti.com/.../580609

    Regards,
    Ryan
  • 0
    TI__Guru**** 223617 points
    Maisie,

    Use one DMA to transfer ADC conversions from a fixed source to an incrementing destination (array) and use a second lower-priority DMA to effectively change the first DMA's source address between ADC12MEM0 to ADC12MEM3 in repeat single transfer mode, this could be a possible workaround to the ADC43 errata while not interfering with transfers for the longest time possible. Another thread of interest: e2e.ti.com/.../

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 380 points

    hii thanks for the prompt reply ,

    do you mean to say , use two dma channels??

    As per my understanding, we got to use ADC sequence-of-channels mode and the ADC12IFG to trigger DMA transfers. On the other hand for the DMA , the source as well as destination address must be incremented. where the destination is an array.

    So will my DMA know the end of sequence (ADC12MEMx reg) that I have configured and stop there ? Also not clear about, on which ADC12IFG my DMA will be interrupted?

    Regards,

    Maisie

  • 0 in reply to Maisie Fernandes
    TI__Guru**** 223617 points
    Yes Maisie, use two DMA channels which both trigger on ADC12IFG. Keep in mind that due to the ADC43 errata, the DMA will be triggered at the end of every ADC conversion instead of at the end of a sequence of channels. The first DMA channel is the size of the destination array and increments the array accordingly, the second DMA channel handles the ADC43 errata by repetitively incrementing the source address of the first DMA channel with the ADC12MEMx register addresses using a size equivalent to the number of ADC channels in the sequence. The first DMA channel should trigger an interrupt after it has finished transferring the full array.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Intellectual 380 points

    Hi Ryan ,

    Thank you so much for the help provided. :)

    So like you said , here's what I did. I used one DMA channel & ADC sequence-of-channels mode and the ADC12IFG to trigger DMA transfers (ADC12MEM0 through ADC12MEM3) the destination is also made to increment. further the DMA transfer size is made 4 , so the DMA channel interrupts only once after all the four ADC channels are read.

    And it worked !

    Regards,

    Maisie

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