Hi,
I've been trying to get this code to work for a week or two now, and I'm having a heck of a time with it. I can see that three different pins are getting data written into the MEM0-MEM2 locations, using the debug tools, but can only get the data from MEM0 into an array I can actually use, prim_buffer0.
I have kindof merged two examples, and was trying to use a working DMA_INT1_IRQHandler to trigger software request of other channels, although this might not be the best way to do it. However, this doesn't work. I have some incrementing ints in the IRQ's, and only the first one ever increments.
#include "msp.h"
#include <driverlib.h>
#include <grlib.h>
#include "Crystalfontz128x128_ST7735.h"
#include <stdio.h>
#include <arm_math.h>
#include "arm_const_structs.h"
#define TEST_LENGTH_SAMPLES 1024
#define SAMPLE_LENGTH 1024
//#define NUMBER_OF_SAMPLES 512
/* ------------------------------------------------------------------
* Global variables for FFT Bin Example
* ------------------------------------------------------------------- */
uint32_t fftSize = SAMPLE_LENGTH;
uint32_t ifftFlag = 0;
uint32_t doBitReverse = 1;
volatile arm_status status;
/* Graphic library context */
Graphics_Context g_sContext;
#define SMCLK_FREQUENCY 48000000
#define SAMPLE_FREQUENCY 24000000
/* DMA Control Table */
#ifdef ewarm
#pragma data_alignment=256
#else
#pragma DATA_ALIGN(controlTable, 256)
#endif
uint8_t controlTable[256];
/* FFT data/processing buffers*/
float hann[SAMPLE_LENGTH];
int16_t prim_buffer0[SAMPLE_LENGTH];
int16_t prim_buffer1[SAMPLE_LENGTH];
int16_t prim_buffer2[SAMPLE_LENGTH];
int16_t alt_buffer0[SAMPLE_LENGTH];
int16_t alt_buffer1[SAMPLE_LENGTH];
int16_t alt_buffer2[SAMPLE_LENGTH];
volatile int switch_data = 0;
/* Timer_A PWM Configuration Parameter */
Timer_A_PWMConfig pwmConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK,
TIMER_A_CLOCKSOURCE_DIVIDER_1,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY),
TIMER_A_CAPTURECOMPARE_REGISTER_1,
TIMER_A_OUTPUTMODE_SET_RESET,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY)/2
};
static uint16_t resultsBuffer[4];
volatile int adcIncrement = 0;
volatile int irq1Increment = 0;
volatile int irq2Increment = 0;
volatile int irq3Increment = 0;
void main(void)
{
/* Halting WDT and disabling master interrupts */
MAP_WDT_A_holdTimer();
MAP_Interrupt_disableMaster();
//memset(resultsBuffer, 0x00, 4);
/* Set the core voltage level to VCORE1 */
MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
/* Set 2 flash wait states for Flash bank 0 and 1*/
MAP_FlashCtl_setWaitState(FLASH_BANK0, 2);
MAP_FlashCtl_setWaitState(FLASH_BANK1, 2);
/* Initializes Clock System */
MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);
/* Configuring Timer_A to have a period of approximately 500ms and
* an initial duty cycle of 10% of that (3200 ticks) */
Timer_A_generatePWM(TIMER_A0_BASE, &pwmConfig);
/* Initializing ADC (MCLK/1/1) */
ADC14_enableModule();
ADC14_initModule(ADC_CLOCKSOURCE_MCLK, ADC_PREDIVIDER_1, ADC_DIVIDER_1, 0);
ADC14_setSampleHoldTrigger(ADC_TRIGGER_SOURCE1, false);
// /* Configuring GPIOs */
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P5, GPIO_PIN5,
GPIO_TERTIARY_MODULE_FUNCTION);
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P5, GPIO_PIN4,
GPIO_TERTIARY_MODULE_FUNCTION);
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P4, GPIO_PIN3,
GPIO_TERTIARY_MODULE_FUNCTION);
/* Configuring ADC Memory */
MAP_ADC14_configureMultiSequenceMode(ADC_MEM0, ADC_MEM2, true);
MAP_ADC14_configureConversionMemory(ADC_MEM0, ADC_VREFPOS_AVCC_VREFNEG_VSS,
ADC_INPUT_A0, false);
MAP_ADC14_configureConversionMemory(ADC_MEM1, ADC_VREFPOS_AVCC_VREFNEG_VSS,
ADC_INPUT_A1, false);
MAP_ADC14_configureConversionMemory(ADC_MEM2, ADC_VREFPOS_AVCC_VREFNEG_VSS,
ADC_INPUT_A10, false);
/* Set ADC result format to signed binary */
ADC14_setResultFormat(ADC_SIGNED_BINARY);
/* Configuring DMA module */
DMA_enableModule();
DMA_setControlBase(controlTable);
DMA_disableChannelAttribute(DMA_CH7_ADC14,
UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
UDMA_ATTR_HIGH_PRIORITY |
UDMA_ATTR_REQMASK);
/* Setting Control Indexes. In this case we will set the source of the
* DMA transfer to ADC14 Memory 0
* and the destination to the
* destination data array. */
MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
prim_buffer0, SAMPLE_LENGTH);
MAP_DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
alt_buffer0, SAMPLE_LENGTH);
/* Assigning/Enabling Interrupts */
MAP_DMA_assignInterrupt(DMA_INT1, 7);
MAP_Interrupt_enableInterrupt(INT_DMA_INT1);
MAP_DMA_assignChannel(DMA_CH7_ADC14);
MAP_DMA_clearInterruptFlag(7);
MAP_Interrupt_enableMaster();
// MAP_ADC14_enableInterrupt(ADC_INT2);
// MAP_Interrupt_enableInterrupt(INT_ADC14);
MAP_DMA_assignInterrupt(DMA_INT2, 1);
MAP_Interrupt_enableInterrupt(INT_DMA_INT2);
MAP_DMA_assignChannel(DMA_CH1_RESERVED0);
MAP_DMA_clearInterruptFlag(1);
MAP_DMA_assignInterrupt(DMA_INT3, 2);
MAP_Interrupt_enableInterrupt(INT_DMA_INT3);
MAP_DMA_assignChannel(DMA_CH2_RESERVED0);
MAP_DMA_clearInterruptFlag(2);
MAP_DMA_enableChannel(1);
MAP_DMA_enableChannel(2);
/* Now that the DMA is primed and setup, enabling the channels. The ADC14
* hardware should take over and transfer/receive all bytes */
MAP_DMA_enableChannel(7);
MAP_ADC14_enableConversion();
/* Forcing a software transfer on DMA Channel 1 */
MAP_DMA_requestSoftwareTransfer(1);
/* Forcing a software transfer on DMA Channel 2 */
MAP_DMA_requestSoftwareTransfer(2);
while(1)
{
MAP_PCM_gotoLPM0();
}
}
//void ADC14_IRQHandler(void)
//{
// adcIncrement++;
//
// uint64_t status;
//
// status = MAP_ADC14_getEnabledInterruptStatus();
// MAP_ADC14_clearInterruptFlag(status);
//
// if(status & ADC_INT2)
// {
// MAP_ADC14_getMultiSequenceResult(resultsBuffer);
// }
//
//}
/* Completion interrupt for ADC14 MEM0 */
void DMA_INT1_IRQHandler(void)
{
irq1Increment++;
/* Switch between primary and alternate bufferes with DMA's PingPong mode */
if (DMA_getChannelAttribute(7) & UDMA_ATTR_ALTSELECT)
{
DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
prim_buffer0, SAMPLE_LENGTH);
switch_data = 1;
}
else
{
DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
alt_buffer0, SAMPLE_LENGTH);
switch_data = 0;
}
MAP_DMA_requestSoftwareTransfer(1);
MAP_DMA_requestSoftwareTransfer(2);
}
/* Completion interrupt for ADC14 MEM7 */
__attribute__((ramfunc))
void DMA_INT2_IRQHandler(void)
{
irq2Increment++;
/* Switch between primary and alternate bufferes with DMA's PingPong mode */
if (DMA_getChannelAttribute(1) & UDMA_ATTR_ALTSELECT)
{
DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH1_RESERVED0,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH1_RESERVED0,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[1],
prim_buffer1, SAMPLE_LENGTH);
}
else
{
DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH1_RESERVED0,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH1_RESERVED0,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[1],
alt_buffer1, SAMPLE_LENGTH);
}
}
/* Completion interrupt for ADC14 MEM8 */
__attribute__((ramfunc))
void DMA_INT3_IRQHandler(void)
{
irq3Increment++;
/* Switch between primary and alternate bufferes with DMA's PingPong mode */
if (DMA_getChannelAttribute(2) & UDMA_ATTR_ALTSELECT)
{
DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH2_RESERVED0,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH2_RESERVED0,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[2],
prim_buffer2, SAMPLE_LENGTH);
switch_data = 1;
}
else
{
DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH2_RESERVED0,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH2_RESERVED0,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[2],
alt_buffer2, SAMPLE_LENGTH);
switch_data = 0;
}
//MAP_Interrupt_disableSleepOnIsrExit();
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Pos;
}
Could anyone give me some insight into what I need to do to actually set up the channels correctly, to get data into prim_buffer1 and prim_buffer2 from ADC14MEM1 and ADC14MEM2 respectively? I've been banging my head against this code for days now, and have rejiggered it in 30 different ways, and haven't made any progress yet.
Regards,
Julian