Part Number: MSP430FR6989
Tool/software: Code Composer Studio
This post is related to the response by Xiaodong LI in this reply: https://e2e.ti.com/support/microcontrollers/msp430/f/166/p/673619/2479155?tisearch=e2e-sitesearch&keymatch=UNMI#2479155
In the code, found in the file msp430fr69xx_of_lfxt1_nmi.c, it allows writing to the CS registers by performing
CSCTL0_H = CSKEY >> 8;
But no where after the fact is the passcode written again to lock the CS registers. Does this mean that the CS registers are not locked again, allowing all future writes to CS to be performed? If so, I would suspect that this isn't best practice?
Also, inside of the UNMI ISR there is a:
__delay_cycles(60000); // Time for flag to set
Is it documented anywhere on what the proper delay time is, or why it should be done? Is it being done just so that the user can see the LED blink, or does it take a certain amount of cycles to clear the flag? If so, what is the consequences if you remove the delay, if any?
After UNMI ISR is service (has completed running), does the micro continuing running where it left off before the fault?
Lastly, regarding the UNMI ISR again, if the code was changed to:
do
{
CSCTL0_H = CSKEY_H; // Added --- Unlock CS registers
CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
__delay_cycles(60000); // Time for flag to set
P1OUT ^= BIT0; // Toggle P1.0 using exclusive-OR
CSCTL0_H = 0; // Added --- Lock CS registers
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag
Would unlocking and locking the CS registers in this fashion cause any issues?