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Heart-Rate Monitor with MSP430: analog to digital converter

Other Parts Discussed in Thread: MSP430FG439

Hi everybody,

 

I am interested by implementing EKG monitor and I have read the application report

"Heart-Rate and EKG Monitor Using the MSP430FG439"

But I have a point that doesn't stop turning in my head.

If I have well understood the report. the EKG monitor solution is using the SAR 12-bit analog to digital converter.

But why the sigma delta analog to digital converter isn't used in this soltion ?

Besides the internal reference 1.2V can be used.

The EKG signal is 1mV, with gain = x1000 -> the input signal on the ADC input is 1V. So I think that if the sigma delta converter is used with the 1.2V as reference we can get better accuracy.

Isn't it ?

THanks for every one contributing to this thread.

 

Herzlich,

INSATien

  • Did you check sampling period and frequency requirements of ECG?

    Due to its nature Sigma-Delta converters cannot change its output value very fast.
    Fast changing signal can saturate approximator and in this case many cycles are required to reach signal value.
    In my opinion, S-D ADC are rather designed for slow signals. You did not write what S-D chip you meant, maybe it had better characteristics.

    Please note that ECG signal contains high amplitude pulse (QRS complex).
    You need also take into consideration that the pulse has amplitude 1mV-4mV (depending on lead configuration that you use),
    while other signal components need 10uV resolution. You should also reserve some margin for isoline floating,
    you will observe it when you move during the recording.

    Regards,
    Piotr Romaniuk, Ph.D.
    ELESOFTROM

     

  • Hi Piotr Romaniuk,

     

    Thanks for your reply.

    I didn't check sampling period and frequency requirements of ECG so if you have some details regarding this point thatnks to share it.

    I am thinking to use sampling frequency of 50 Ksample/s. But what about the sampling frequency requirements for ecg ?

    I understand now that using the internal reference 1.2V is not a good solution if I want to detect the 4mV amplitude. Perhaps I will use the 3.3V as reference.

    Thanks very much.

     

    Thanks and regards,

    INSATien

  • You can expect that ECG signal spectrum is below 150 Hz *.
    The sampling frequency should not be lower than 300Hz, but if you have not very good anti-aliasing filter on the input
    it is better to use higher sampling frequency and filter it in digital domain if required.
    I advise to use 1kHz for initial tests. You can record ECG signal and after that make FFT and evaluate the real spectrum and out-of-band noise
    (it is good to plot it in dB scale on amplitude axis). Later you can try to use 500Hz.
    It is not good idea to oversample the signal very much (like 50kHz/150Hz), because you will obtain a lot of samples but not more data.

    If you plan to use S-D ADC please check what slew rates of the signal can be sampled by this type of ADC.
    I think that the limit is dependent on sampling frequency, so in this case you may need to use higher sampling frequency.

    The amplitude of the signal depends on the lead configuration, the ones on chest have higher amplitude than measured from wrists and legs.
    It is good to have input range about a few mV. You will be able to prevent input saturation due to isoline floating and handle signals
    with higer amplitude.

    Regards,
    Piotr Romaniuk, Ph.D.
    ELESOFTROM

    PS
    *) - this limit does not apply to high frequency components in ECG, but they are very low amplitude and are not important in regular recording.

  • Piotr Romaniuk said:
    You can expect that ECG signal spectrum is below 150 Hz *.
    The sampling frequency should not be lower than 300Hz, but if you have not very good anti-aliasing filter on the input
    it is better to use higher sampling frequency and filter it in digital domain if required.

    That's the domain of Delta-Sigma ADCs. Almost all SD16 modules (despite the naming SD, it is a Delta-Sigma because first the delta is calculated, then the sigma is accumulated). work wiht a samplign frequency of up to 1MHz. Sampling frequency does nto mean conversion frequency/samplerate on these devices. The 1MBaud data stream is fed into a digital filter, where a sequence of 32 to 1024 bits (depending on the oversampling ratio settign OSRx) are filtered to the result. So with highest resolution, the SD16 can still deliver 1K samples/s (and with lower resolution up to 32k/s).
    The advantage of the SD is that it is cheap and has a really large dynamic range. That means, small signals don't vanish in the noise carpet. The drawback is the limited conversion frequency (the ADC12 can do more than 10 times as many conversion per second) and the inherent vulnerability to high-frequent signal changes (if the signal changes during the 1024 independent bit samples, the change will influence the remaining samples, while on the ADC12, a snapshot of the input voltage is taken and then converted).

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