Other Parts Discussed in Thread: MSP430F67791A
Hi everyone
I am trying to develop a Three-Phase Watt-Hour Meter based on the SLAA577F Application Report with the MSP430F67791A device.
Dynamic phase correction will be needed in this project and since the SLAA577F implementation does not do dynamic phase correction and also does not use the SD24 phase correction hardware of the VOLTAGE ADC’s, I thought I could use this structure to do my small dynamic corrections (less than 2 deg) without disturbing the SLAA577F routines.
More specifically, I am loading the SD24BPREx voltage preload registers directly with my dynamic corrections, being aware of the recommendation that "conversions on the SD must be stopped while changes are made to the phase compensation". To attend this requisite, I am disabling interrupts, delaying conversion restart, etc, with no success. For some combinations of preload values, the software always hangs in the ISR, even if I load the SD24BPREx voltage registers in the initialization. Could someone help me with this problem?
In addition, I also need to be able to load (only once, in the beginning of the execution) the SD24BPREx current preload registers, writing my values to the nv segment constants ( DEFAULT_BASE_PHASE_x_CORRECTION_LOW ) prior to the moment they are read by the SLAA577F routines. To do so, I had to understand the SLAA577F process, and came across some apparent incoherences:
Setting different DEFAULT_BASE_PHASE_A_CORRECTION_LOW values in the source program, compiling, executing and reading registers/values with the debugger, I got the following results:
DEFAULT_BASE_PHASE_A_CORRECTION_LOW SD24BPRE4 STEPS
0 0 2 (I_HISTORY_STEPS)
1 255 2 (should be 1, I think)
-1 1 3 (should be 2)
256 0 1
10 246 2 (should be 1)
-10 10 3 (should be 2)
300 212 1 (should be 0)
-300 44 4 (should be 3)
I interpreted these results assuming that:
1) a negative DEFAULT_BASE_PHASE_A_CORRECTION_LOW means a delay in the current of phase A with respect to all other ADC’s (currents and voltages), and that
2) I_HISTORY_STEPS = 2 means that all SD24 ADC’s start with a default delay of 2 SD24 samples or 2*256 units of SD24 delays (not 128 as SLAA577F suggests).
This being the case, the second example (DEFAULT_BASE_PHASE_A_CORRECTION_LOW = 1) means an anticipation of 1 in 256 units of SD24 delays. Since all SD24 ADC’s start with a delay of 2 STEPS (2*256 SD24 delay units), the correct setting for the anticipation of one unit is to set a delay of 255 in the SD24 plus one STEP (one sample period), not two.
In the last example, DEFAULT_BASE_PHASE_A_CORRECTION_LOW = -300 means a delay of 44 + 256 units of SD24 delays plus the 2 default STEPS, which results in 44 SD24 delay units plus 3 STEPS (3 sample periods), not 4.
I would appreciate it very much if someone could help me with these questions.
Thanks
Claudio R. Sonnenburg