This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: MSP432P401R
I try the MAP_I2C_masterSendSingleByte(), and MAP_I2C_masterReceiveSingleByte(), but there is a stop in between, and I prefer to use interrupt routine, which can catch the NACK status.
I would like to monitor the SCL and SDA lines stuck low condition, where can I find line status from registers?
Hello,
I did some testing for this scenario and discovered some caveats.
The transaction attempted is Master TX 1 byte, Restart, Master RX 1 byte.
First when it comes to the master TX, you have two available flags, one when the start + address is sent & the other is TXIFG.
The important thing to note about TXIFG is that it is NOT set when the byte is transmitted on the bus.
Instead TXIFG is set when the data byte moves from the TXBUF to the transmit shift register in preparation to be sent out.
This means that after TXIFG is set, we still have 9 I2C CLOCKS before the actual data byte is sent.
If the I2C is running at 100KHz & the CPU is at 3MHz (default) , this is about 300 CPU cycles.
The application needs to delay these 300 cycles before sending the restart or the transaction may stall or result in a stop.
In order to keep this timing tight, in my example I have used an inline delay with no interrupts.
However it is also possible to enabled TXIFG, delay 300 cycles in the ISR and then send the restart.
I assume this is not preferable since ISRs could be blocking.
Second when it comes to the RX of one byte, there seems to be a timing issue with the API "Masterreceivesinglebyte".
I was also unable to create a successful one byte read with this API.
However I managed to do so by using direct register access code & altering the sequence.
My guess is that the I2C transactions/ state machine being slower than MCLK is causing this.
Since I got my example to work, successfully transmitting, then receiving one byte, I've attached it to this post.
I've also filed a bug against the API & will come back to post here if there are further updates.
I am marking this thread resolved, feel free to let me know if you have additional questions.
PS: The test setup is 2x MSP432 LPs , one as master and the other as slave.
Regards,
Priya
/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
/******************************************************************************
* MSP432 I2C - EUSCI_B0 I2C Master TX 1 bytes to MSP432 Slave
* and reads one byte back following a repeated start
*
* Description: This demo connects two MSP432 's via the I2C bus. The master
* transmits to the slave. This is the MASTER CODE.
* _________________________________________________________
* | Start | | Start | | |
* | 0x48Addr | 0x04 | 0x48Addr | <1 Byte Read> | Stop |
* | W | | R | | |
* |__________|______|__________|___________________|_______|
*
* ACLK = n/a, MCLK = HSMCLK = SMCLK = BRCLK = default DCO = ~3.0MHz
*
* /|\ /|\
* MSP432P4111 10k 10k MSP432P4111
* slave | | master
* ----------------- | | -----------------
* | P1.6/UCB0SDA|<-|----+->|P1.6/UCB0SDA |
* | | | | |
* | | | | |
* | P1.7/UCB0SCL|<-+------>|P1.7/UCB0SCL |
* | | | |
*
*****************************************************************************/
/* DriverLib Defines */
#include <ti/devices/msp432p4xx/driverlib/driverlib.h>
/* Slave Address for I2C Slave */
#define SLAVE_ADDRESS 0x48
#define NUM_OF_REC_BYTES 1
/* Variables */
const uint8_t TXData[] = {0x41,0x42};
unsigned char RXData=0;
/* I2C Master Configuration Parameter */
const eUSCI_I2C_MasterConfig i2cConfig =
{
EUSCI_B_I2C_CLOCKSOURCE_SMCLK, // SMCLK Clock Source
3000000, // SMCLK = 3MHz
EUSCI_B_I2C_SET_DATA_RATE_100KBPS, // Desired I2C Clock of 100khz
0, // No byte counter threshold
EUSCI_B_I2C_NO_AUTO_STOP // No Autostop
};
int main(void)
{
/* Disabling the Watchdog */
MAP_WDT_A_holdTimer();
/* Select Port 1 for I2C - Set Pin 6, 7 to input Primary Module Function,
* (UCB0SIMO/UCB0SDA, UCB0SOMI/UCB0SCL).
*/
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1,
GPIO_PIN6 + GPIO_PIN7, GPIO_PRIMARY_MODULE_FUNCTION);
MAP_GPIO_setAsOutputPin(GPIO_PORT_P3, GPIO_PIN0);
/* Initializing I2C Master to SMCLK at 100khz with no autostop */
MAP_I2C_initMaster(EUSCI_B0_BASE, &i2cConfig);
/* Specify slave address */
MAP_I2C_setSlaveAddress(EUSCI_B0_BASE, SLAVE_ADDRESS);
/* Enable I2C Module to start operations */
MAP_I2C_enableModule(EUSCI_B0_BASE);
/* Send out start + address + 1 data byte */
MAP_I2C_masterSendMultiByteStart(EUSCI_B0_BASE, TXData[1]);
//wait for first byte to be moved to shift register
while(!(EUSCI_B0->IFG & EUSCI_B_IFG_TXIFG));
EUSCI_B0->IFG &= ~(EUSCI_B_IFG_TXIFG);
// Before the restart is sent, app has to wait for current TX byte + ack to complete
// This takes 9 cycles at 100kHz = 90uS
// The MCLK default = ~3MHz
// to complete the 1 byte TX app needs to wait ~270 MCLK cycles at a minimum
__delay_cycles(300);
//clear the TR bit to setup master as receiver
EUSCI_B0->CTLW0 &= ~(EUSCI_B_CTLW0_TR);
// Send the start + address
EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TXSTT;
// wait for address to be sent
while(!(EUSCI_B0->CTLW0 & EUSCI_B_CTLW0_TXSTT));
// set stop immediately to ensure only one byte is read
EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_TXSTP;
// poll RX flag
while(!(EUSCI_B0->IFG & EUSCI_B_IFG_RXIFG0));
// Read from Receive buffer
RXData = EUSCI_B0->RXBUF;
// ensure I2C transaction has completed
while (MAP_I2C_masterIsStopSent(EUSCI_B0_BASE));
while(1);
}
/* --COPYRIGHT--,BSD,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
/******************************************************************************
* MSP432 I2C - EUSCI_B0 I2C Slave
*
* Description: This demo connects two MSP432 's via the I2C bus.
* _________________________________________________________
* | Start | | Start | | |
* | 0x48Addr | 0x04 | 0x48Addr | <1 Byte Read> | Stop |
* | W | | R | | |
* |__________|______|__________|___________________|_______|
*
* ACLK = n/a, MCLK = HSMCLK = SMCLK = BRCLK = default DCO = ~3.0MHz
*
* /|\ /|\
* MSP432P4111 10k 10k MSP432P4111
* slave | | master
* ----------------- | | -----------------
* | P1.6/UCB0SDA|<-|----+->|P1.6/UCB0SDA |
* | | | | |
* | | | | |
* | P1.7/UCB0SCL|<-+------>|P1.7/UCB0SCL |
* | | | |
*
*****************************************************************************/
/* DriverLib Includes */
#include <ti/devices/msp432p4xx/driverlib/driverlib.h>
/* Standard Defines */
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
/* Application Defines */
#define SLAVE_ADDRESS 0x48
#define NUM_OF_RX_BYTES 1
#define NUM_OF_TX_BYTES 10
/* Application Variables */
static volatile uint8_t RXData[NUM_OF_RX_BYTES];
static volatile uint32_t xferIndex;
const uint32_t TXData[NUM_OF_TX_BYTES] =
{
0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99
};
int main(void)
{
/* Disabling the Watchdog */
MAP_WDT_A_holdTimer();
xferIndex = 0;
/* Select Port 1 for I2C - Set Pin 6, 7 to input Primary Module Function,
* (UCB0SIMO/UCB0SDA, UCB0SOMI/UCB0SCL).
*/
MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1,
GPIO_PIN6 + GPIO_PIN7, GPIO_PRIMARY_MODULE_FUNCTION);
/* eUSCI I2C Slave Configuration */
MAP_I2C_initSlave(EUSCI_B0_BASE, SLAVE_ADDRESS, EUSCI_B_I2C_OWN_ADDRESS_OFFSET0,
EUSCI_B_I2C_OWN_ADDRESS_ENABLE);
/* Enable the module and enable interrupts */
MAP_I2C_enableModule(EUSCI_B0_BASE);
MAP_I2C_clearInterruptFlag(EUSCI_B0_BASE, EUSCI_B_I2C_RECEIVE_INTERRUPT0);
MAP_I2C_enableInterrupt(EUSCI_B0_BASE, EUSCI_B_I2C_RECEIVE_INTERRUPT0);
MAP_Interrupt_enableInterrupt(INT_EUSCIB0);
MAP_Interrupt_enableSleepOnIsrExit();
MAP_Interrupt_enableMaster();
/* Sleeping while not in use */
while (1)
{
MAP_PCM_gotoLPM0();
}
}
/*******************************************************************************
* eUSCIB0 ISR. The repeated start and transmit/receive operations happen
* within this ISR.
******************************************************************************/
void EUSCIB0_IRQHandler(void)
{
uint_fast16_t status;
status = MAP_I2C_getEnabledInterruptStatus(EUSCI_B0_BASE);
MAP_I2C_clearInterruptFlag(EUSCI_B0_BASE, status);
/* RXIFG */
if (status & EUSCI_B_I2C_RECEIVE_INTERRUPT0)
{
RXData[xferIndex++] = MAP_I2C_slaveGetData(EUSCI_B0_BASE);
/* Resetting the index if we are at the end */
if (xferIndex == NUM_OF_RX_BYTES)
{
xferIndex = 0;
MAP_I2C_disableInterrupt(EUSCI_B0_BASE,
EUSCI_B_I2C_RECEIVE_INTERRUPT0);
MAP_I2C_enableInterrupt(EUSCI_B0_BASE,
EUSCI_B_I2C_TRANSMIT_INTERRUPT0);
}
}
/* TXIFG */
if (status & EUSCI_B_I2C_TRANSMIT_INTERRUPT0)
{
MAP_I2C_slavePutData(EUSCI_B0_BASE, TXData[xferIndex++]);
/* Resetting the index if we are at the end */
if (xferIndex == NUM_OF_TX_BYTES)
{
xferIndex = 0;
MAP_I2C_disableInterrupt(EUSCI_B0_BASE,
EUSCI_B_I2C_TRANSMIT_INTERRUPT0);
MAP_I2C_enableInterrupt(EUSCI_B0_BASE,
EUSCI_B_I2C_RECEIVE_INTERRUPT0);
}
}
}
**Attention** This is a public forum