How TIMER_PERIOD 127 is calculated is there any calculation for this?
//*******************************************************************************
//!Timer_A3, PWM TA1.1-2, Up/Down Mode, DCO SMCLK
//!
//!Description: This program generates two PWM outputs on P2.0,P2.1 using
//!Timer1_A configured for up/down mode. The value in CCR0, 128, defines the
//!PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using
//!~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle
//!on P2.0 and 25% on P2.1.
//!SMCLK = MCLK = TACLK = default DCO ~1.045MHz.
//!
//!Tested On: MSP430F5529
//! -------------------
//! /|\| |
//! | | |
//! --|RST |
//! | |
//! | P2.0/TA1.1|--> CCR1 - 75% PWM
//! | P2.1/TA1.2|--> CCR2 - 25% PWM
//!
//! This example uses the following peripherals and I/O signals. You must
//! review these and change as needed for your own board:
//! - Timer peripheral
//! - GPIO Port peripheral
//!
//! This example uses the following interrupt handlers. To use this example
//! in your own application you must add these interrupt handlers to your
//! vector table.
//! - NONE
//!
//
//*****************************************************************************
#include "driverlib.h"
#define TIMER_PERIOD 127
#define DUTY_CYCLE1 32
#define DUTY_CYCLE2 96
