I2C Slave data read problem. Stellaris / Tiva, CC2541.

Hello Piotr,

The I2C Slave Transmit data will be put out only when a Transmit Request comes. So the code should be done in the manner where based on the RREQ the Interrupt Handler preps a global data buffer and exits the Interrupt loop. If a TREQ comes then it puts the data in the buffer.

As for Q.2: There is a FBR bit in the I2C Slave Status Register which will tell you if this is the first byte received after address...

As for the ACK Override, you need to set the bit-0 ACKOEN. On receiving a data byte, you need to then write to the bit-1 ACKOVAL so that I2C Slave can ACK or NACK

Regards

Amit

Thank you Amit,

Amit Ashara said:

The I2C Slave Transmit data will be put out only when a Transmit Request comes. So the code should be done in the manner where based on the RREQ the Interrupt Handler preps a global data buffer and exits the Interrupt loop. If a TREQ comes then it puts the data in the buffer.

That's it. There are two interrupts, one when Master writes and second when requesting data. Now the code works but not perfect. Usually I receive correct values but sometimes in the case I2C_SLAVE_ACT_RREQ_FBR described below I am receiving the value, that I have sended in case I2C_SLAVE_ACT_TREQ by executing I2CSlaveDataPut() in previous interrupt. Eg when I had sent 50 I am receiving 50 - not the value from master.

Q1. How to get rid of that? I must wait in interrupt until the specific condition is met? If yes, which one and where?

case I2C_SLAVE_ACT_RREQ_FBR:
{
// here when Master sends exact 1 B - normal write
receivedCC2541 = I2CSlaveDataGet(I2C1_SLAVE_BASE);
break;
}

Full code:

#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_ints.h"
#include "inc/hw_i2c.h"
#include "driverlib/debug.h"
#include "driverlib/fpu.h"
#include "driverlib/gpio.h"
#include "driverlib/pin_map.h"
#include "driverlib/rom.h"
#include "driverlib/sysctl.h"
#include "driverlib/i2c.h"
#include "driverlib/interrupt.h"

#include "driverlib/uart.h"
#include "utils/uartstdio.h"
#include "peripherials.h"

#ifdef DEBUG
void
__error__(char *pcFilename, uint32_t ui32Line)
{
}
#endif

/* variables, const */

	#define SLAVE_OWN_ADDRESS	0x02

	typedef
			volatile unsigned short vus;
	static vus receivedCC2541;
	static vus buffor10[2] = {0,10};
	static vus buffor20[2] = {0,20};
	static vus buffor30[2] = {0,30};
	static vus buffor40[2] = {0,40};
	vus *pBuffor10 = &buffor10[1]; //last elem
	vus *pBuffor20 = &buffor20[1]; //last elem
	vus *pBuffor30 = &buffor30[1]; //last elem
	vus *pBuffor40 = &buffor40[1]; //last elem
	unsigned short intflag = 0;

void I2C1SlaveIntHandler(void)
{
	I2CSlaveIntClear(I2C1_SLAVE_BASE);
	I2CSlaveIntClearEx(I2C1_SLAVE_BASE,I2C_SLAVE_INT_DATA);

	while(I2CSlaveStatus(I2C1_SLAVE_BASE) & I2C_SLAVE_ACT_NONE);
	switch(I2CSlaveStatus(I2C1_SLAVE_BASE))
	{
		case I2C_SLAVE_ACT_RREQ_FBR:
		{
			// here when Master sends exact 1 B - normal write
			receivedCC2541 = I2CSlaveDataGet(I2C1_SLAVE_BASE);
			break;
		}

		case I2C_SLAVE_ACT_RREQ:
		{
			// here when Master sends WRITE and more than 1 B to send - burst write
			receivedCC2541 = I2CSlaveDataGet(I2C1_SLAVE_BASE);
			break;
		}

		case I2C_SLAVE_ACT_TREQ:
		{
			// when transmit request
			switch(receivedCC2541)
				{
				case 10:
					I2CSlaveDataPut(I2C1_SLAVE_BASE, *pBuffor10);
					break;
				case 20:
					I2CSlaveDataPut(I2C1_SLAVE_BASE, *pBuffor20);
					break;
				case 30:
					I2CSlaveDataPut(I2C1_SLAVE_BASE, *pBuffor30);
					break;
				case 40:
					I2CSlaveDataPut(I2C1_SLAVE_BASE, *pBuffor40);
					break;
				default:
					I2CSlaveDataPut(I2C1_SLAVE_BASE, 0); // many times here
					GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_3,GPIO_PIN_3);
					GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_2,GPIO_PIN_2);

					break;
				}
			break;
		}
		default:
			//should not get here
			break;
	}
	intflag = 1;
}

main(void)
 {
	ROM_FPUEnable();
    ROM_FPULazyStackingEnable();
    SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
                   SYSCTL_XTAL_16MHZ);
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);
    ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2);
    ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C1);
    ROM_GPIOPinConfigure(GPIO_PA6_I2C1SCL);
    ROM_GPIOPinConfigure(GPIO_PA7_I2C1SDA);
	GPIOPinTypeI2CSCL(GPIO_PORTA_BASE, GPIO_PIN_6);
	GPIOPinTypeI2C(GPIO_PORTA_BASE, GPIO_PIN_7);
    I2CSlaveEnable(I2C1_SLAVE_BASE);
    I2CSlaveInit(I2C1_SLAVE_BASE, SLAVE_OWN_ADDRESS);

    /* Enable interrupts */
    I2CSlaveIntEnable(I2C1_SLAVE_BASE);
    I2CSlaveIntEnableEx(I2C1_SLAVE_BASE, I2C_SLAVE_INT_DATA);
	IntEnable(INT_I2C1);
    IntMasterEnable();

    ConfigureUART();

    while(1)
    {
    	if(intflag)
    	{
    		intflag = 0;
    		GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1,0);
    		GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_2,0);
    		GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_3,0);
    	}
    }
}

Regards

Piotr

Hello Piotr,

Since each of the transaction is a full transfer, I would suggest using the Start and Stop Interrupt bits to separate a Receive frame and Transmit Frame. In other words a Start condition is used to qualify the FBR or TREQ and Stop to close the qualifier. If an interrupt occurs not during the qualifier, then ignore it.

Also like previous plot, it would be useful to see when a failure FBR occurs, what is the frame looking like

Regards

Amit