SWD and JTAG problems

We use IAR - not your 129x MCU - and not CCS.  Believe that CCS does not support SWD.  (pity that)

For all past LM3S, LX4F and the newer TM4C we've successfully run (exclusively) via SWD.  The 2 pins it liberates are often useful and SWD appears faster & more robust than JTAG - during our past 4+ years exclusive usage.

Note that certain other, ARM MCUs - run SWD exclusively - that may signal something...

IAR Kickstart - or Keil both have long supported SWD - you're debug-less thanks to "free" CCS...  (both those "real" IDEs have free (code size limited) versions for your trial.)  We always use J-Link pod - I'm unsure if that's a requirement to "talk" SWD.  (Segger (J-Link maker) site/contact will know/confirm...)

While the MCU's internal pull-up R's "sometimes" work - our small tech group much prefers the more robust signal levels and far sharper signal edges yielded by 4K7 - 10K external Rs.  Repeatedly we've rescued clients who "believed" the internal MCU usage suggestion - but those signals (resulting from MCU's "weak" pull-up Rs) have too often proved borderline.  Cost/size penalty imposed by 2 06-03 Rs seems to well meet, "risk/reward."

CB1...

Appreciate the prompt reply. Not exactly the news I was hoping for.

I will take your pull-up resistor advice and hastily append them to my circuit board.

Re CC, I am using the free version and am still within the 90-day trial period. Would you happen to know if it is this trial version that has SWD disabled, and perhaps the full version supports it? Or is your belief that even the fully-licensed (i.e., paid for) version does not support SWD?

Seems strange that TI would make the hardware capable but not the IDE. So I'm hoping this can be solved with Visa card and license key.

Failing that, I dread the possibility that I would have to dumb down my debug interface to full JTAG as I have become quite accustomed to the ease, speed and low-pin usage of SWD on previous ARM designs using competitors products. It would feel like a real kick in the teeth to find we abandoned the old platform (NXP and IAR with JLink HW interface) to spec in a TI part and not have SWD capability.

Really hoping I can get an official, definitive response to this soon.

Thanks much for the input.

rchaswin said:

Really hoping I can get an official, definitive response to this soon.

My knowledge/comment upon CCS/it's ilk are far from, "official."  (but may be accurate - of some value)  We've induced many of our tech clients to move to, "real IDEs" - those able to support ARM MCUs from multiple vendors; those fully embracing SWD; and those which include in-built cycle-counters, detailed CRC set-up/verification, and which have a long established history of ease of use and simple robustness.

My belief is that SWD has yet to fully/properly "land" @ CCS.  That fact's been "duly noted" - but has yet to result in, "Present & Accounted for" during CCS rollcall...  (that's my opinion)

As you report experience w/IAR & J-Link - and as that mature/full functioned IDE supports SWD - the appeal of "free" must out-weigh that of functionality/robustness...  (and often - you "get" what you pay for...)

Understand on "officialness" of comment. Did not mean to suggest your experience was inaccurate or invalid. In fact I'm certain your stick time with MCUs and IDEs is more extensive than mine... and possibly even the TI insider who might be inclined to respond to my issue.

The "however" part of this reply is that I already have target boards designed and fabbed which have no easy way to access or connect to the TDI and TDO pins to go to full JTAG. (Did not place test points or series resistors in line with IC pins). Also, our outside developer is already using CCS and we have code that needs to be blended/shared with minimal complication.

So my hope was to devote a little time to getting the SWD working in some rudimentary form to verify the hardware design for now, then make the needed changes on the next pcb revision.

That said, it occurred to me that I ought to be able to use the eval board and disconnect the TDI & TDO lines and, if supported, have the SWD take over programming duties. If Ive read the data sheet correctly (and it's highly likely I did not!) the ICDI sort of "autobauds" and detects which connections are present. Ostensibly, the SWD initialization header is written with this in mind. But alas, removing the TDI/O lines results in "unable to connect to target".

This, then, begs the question that *IF* SWD is supposed to work as hinted, is there something additional I must do -- CCS debug setup, remove pullups, etc -- to coax the MCU to into SWD mode?

Your insights appreciated.

One more thing... all other forum discussions on this topic seem to be a year old or more, so I figured maybe by upgrading to CCS v6 (release a few mos ago) I might improve my chances of finding friendlier SWD support.

So far it has not been the case...

Wish my small tech group/I could better assist - but a vendor-bound IDE was never even a slight consideration for us.  I recall multiple poster's here - seeking SWD - and always leaving with, "Duly noted..."  (kin to, "check's in the mail.")

Is not your code writing your major work-load/work-product?  Can't it be incorporated w/in a, "real" IDE - and then transferred to your boards via, "normal/customary" SWD?  As past stated - we've used SWD exclusively w/TM4C and all predecessor MCUs - sourced here.  (yet not w/129x - it's not to our interest) 

As you've past used IAR - and appear to own or have access to J-Link - might it make sense to develop a simple program (ideally one not involving Port C {dreaded JTAG/SWD lockout}) and load that to your new boards via SWD as, "Test/verification?"  Free Kickstarter will enable up to 32KB - at least you can "prove" your SWD HW and the IDE's capability.

Decade or so past - when we designed heavily w/Xilinx FPGAs - we employed MCU's "bit-bang" of JTAG - to dynamically reconfigure the FPGA while in operation.  Perhaps your "read/review" of the SWD spec may suggest a means to "model" that past Xilinx method - shifted now into SWD format.  (i.e. you develop your code w/CCS - then employ a separate MCU to "dump that code" into your board - in conformance w/SWD format.)

Dawns that there have existed (past) parallel port to JTAG PC applications.  Perhaps your search for "USB to SWD" may yield a workable alternative.  Again - our group feels no desire to become IDE "mavens" - we're simple appliance operators - proud/pleased to design/develop our MCU based products. 

IAR fully automates the JTAG/SWD "switchover" process - your creation of a small "sniffer" hardware/program may enable you to contrast the output of the J-Link when in JTAG and then SWD modes.  (may require you to "test" via an official vendor board (not your JTAG-lite, custom) which should accept both JTAG & SWD.)  (Gold star should this last ditch idea pan out...) *** In past MCU manuals - the SWD "preamble" code was described.  This sequence prepares the MCU to "accept" your SWD formatted data...

cb1

I think you may have hit upon an interim solution for me. No reason I couldn't fire up the old IAR and J-Link combo as you suggest and at least prove the hardware before spinning board. It certainly never gave me any grief with the SWD interface. In fact, still do some development with it on M0 products.

Meantime I can contemplate the SWD matter and give the TI insiders a chance to weigh in. Perusing the web and TI Wiki I saw 2 year-old articles mentioning that the launchpads for the Stellaris product line (Tiva predecessor) did not support SWD without jumping through many hoops. It would seem 2 years hence, and several upgrade versions of CCS, that this failing would have been duly addressed. As an old-school analog audio guy, I'm a bit of an involuntary and reluctant coder, so I'm scarcely above the level of neophyte when it comes to advanced communication issues. I am therefore not inclined to embark on creating a JTAG preamble to induce SWD mode as the division of labor on this project only requires me to calculate coefficients and send them to a dsp... something I am already somewhat familiar with.

For now, I will see about having someone with better eyes and solder skills tack on a couple of flying jumpers to the unconnected TDI/O pins and give that a go.

again, much thanks for the voice of experience.

rchaswin said:

better eyes and solder skills... tack on flying jumpers... to the unconnected...

Now this reporter joins the ranks of the JTAG/SWD confused.  (again...)

Did you not design your custom boards for SWD?  Those 2 SWD signal lines - so long as they're properly (i.e. externally) pulled up - should already exist - should they not?  They're PC0/PC1 iirc - this vendor...

Thus - what's to connect?  (pull-ups alone upon the 2 (now liberated) unused, JTAG signal lines should suffice but you may be able to escape w/out their use...)  Quick/easy to hook-in your J-Link - set IAR into SWD - and test/verify...  (IAR manages all of the "tough stuff...")

Sorry for confusion... Custom board is designed for SWD, yes.

However, at some point, because I'm a bit of slave to the outside UI coder, I will have to merge my dsp-related code with his web interface code. And I need to accommodate his preferred method of development, namely CCS.

So I can work with IAR to get my dsp modules working, but since I'm also the hardware guy I need to make it so he can do his development simultaneously. Proto 2 pcb revision will then have the needed pins.