TM4C1294 SSI transmit Receive Interrupt issue

//My init function

	//
	// The SSI0 peripheral must be enabled for use.
	//
	SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

	//
	// For this example SSI0 is used with PortA[5:2].  The actual port and
	// pins used may be different on your part, consult the data sheet for
	// more information.  GPIO port A needs to be enabled so these pins can
	// be used.
	SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

	//
	// Configure the pin muxing for SSI0 functions on port A2, A3, A4, and A5.
    // This step is not necessary if your part does not support pin muxing.
	GPIOPinConfigure(GPIO_PA2_SSI0CLK);
    GPIOPinConfigure(GPIO_PA3_SSI0FSS);
	GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
	GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);

	//
	// Configure the GPIO settings for the SSI pins.  This function also gives
	// control of these pins to the SSI hardware.  Consult the data sheet to
	// see which functions are allocated per pin.
	// The pins are assigned as follows:
	//      PA5 - SSI0Rx
	//      PA4 - SSI0Tx
	//      PA3 - SSI0Fss
	//      PA2 - SSI0CLK
	GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2);


	//
	// Configures the synchronous serial interface.
	// This function configures the synchronous serial interface.  It sets
	// the SSI protocol, mode of operation, bit rate, and data width.
	//
	SSIConfigSetExpClk(SSI0_BASE, ui32SysClockfreq, SSI_FRF_MOTO_MODE_1,SSI_MODE_MASTER, ui32SPIClockfreq, 16);

	//
	// Enable the SSI0 module.
	//
	SSIEnable(SSI0_BASE);

	//
	// Enable the Interrupt source SSI_RXFF for Recieve FIFO full or less.
	//
	SSIIntEnable(SSI0_BASE, SSI_RXFF);

	//
	// Enable the Interrupt source SSI_RXFF for Recieve FIFO full or less.
	//
	SSIIntEnable(SSI0_BASE, SSI_RXOR);

	//
	// Disable the all other Interrupt sources
	//
	SSIIntDisable(SSI0_BASE, SSI_TXFF);
	SSIIntDisable(SSI0_BASE, SSI_TXEOT);
	SSIIntDisable(SSI0_BASE, SSI_RXTO);

	//
	// clear any pending interrupt
	//
	SSIIntClear(SSI0_BASE, SSI_RXFF);
	SSIIntClear(SSI0_BASE, SSI_RXOR);


    return (void)0;



//My Transmit code on Master side 
	uint32_t l_i_data1[2] = {0xAAAA,0xAAAA};

	
	if (SSIDataPutNonBlocking(SSI0_BASE, l_i_data1[0]) != 0 )
	{

	}

	Wait until SSI0 is done transferring all the data in the transmit FIFO.
	while( SSIBusy(SSI0_BASE) )
	{ ; }


	if (SSIDataPutNonBlocking(SSI0_BASE, l_i_data1[1]) != 0 )
	{

	}

	
	while( SSIBusy(SSI0_BASE) )
	{ ; }

	if (SSIDataPutNonBlocking(SSI0_BASE, l_i_data1[0]) != 0 )
	{

	}

	Wait until SSI0 is done transferring all the data in the transmit FIFO.
	while( SSIBusy(SSI0_BASE) )
	{ ; }


	if (SSIDataPutNonBlocking(SSI0_BASE, l_i_data1[1]) != 0 )
	{

	}

	
	while( SSIBusy(SSI0_BASE) )
	{ ; }
	return (void)NO_ERROR;
	
	
//My receive handler code on Master side. interrupt base.

	uint32_t  ulStatus;


	//
	// Read interrupt status.
	//
	ulStatus = SSIIntStatus(SSI0_BASE, 1);


	if(ulStatus & SSI_RXFF  || ulStatus & SSI_RXOR)
	{
		//
		// Read NUM_SSI_DATA bytes of data from SSI2 RX FIFO.
		//
		while(!SSIDataGetNonBlocking(SSI0_BASE, &g_ul_SSIDataRx[0]))
		{
		}
		while(!SSIDataGetNonBlocking(SSI0_BASE, &g_ul_SSIDataRx[1]))
		{
		}
		while(!SSIDataGetNonBlocking(SSI0_BASE, &g_ul_SSIDataRx[2]))
		{
		}
		while(!SSIDataGetNonBlocking(SSI0_BASE, &g_ul_SSIDataRx[3]))
		{
		}

#ifdef DEBUG_UART
		UARTprintf("\nFirst\n");
		UARTprintf("\nRX[0].%x\n",g_ul_SSIDataRx[0]);
		UARTprintf("\nRX[1] %x\n",g_ul_SSIDataRx[1]);
		UARTprintf("\nRX[2] %x\n",g_ul_SSIDataRx[2]);
		UARTprintf("\nRX[3] %x\n",g_ul_SSIDataRx[3]);
#endif /*DEBUG_UART*/


	}


	//
	// Clear interrupts.
	//
	SSIIntClear(SSI0_BASE, ulStatus);

#ifdef DEBUG_UART
	UARTprintf("\nClear interrupts: %x\n",ulStatus);
#endif /*DEBUG_UART*/