TIVA software update using SPI

Praveen Batapati

Other Parts Discussed in Thread: TM4C123BH6ZRB

Hi,

I am currently using TI TIVA TM4C123BH6ZRB microcontroller on a custom board. I am trying to update the software on the chip. I configure the SPI interface and jump into ROM bootloader's update function. My SPI on the TIVA (slave) is configured as follows,

clk - = 40 Mhz

bitrate = 3Mhz

datawidth = 8

The TIVA is connected to another microprocessor on the board through a SPI bus. I run a program on this processor(master) to update the TIVA. I was able to update the software on the TIVA using the TI specific protocol. I have followed the protocol as specified in the documnetation. But, I have few questions on it.

1: Everything works fine if I send the packet one byte at a time. But, if I try to send the entire packet of 11 bytes in my case(3 bytes of metadata + 8 bytes of data), i get the checksum acknowledgement from the bootloader, but nothing gets written on the flash. I don't see this problem if the data is sent one byte at a time.

2: The size of my image is around 230kB. It takes around 90 seconds to update, which i think is a lot of time. Do you have any recommendations to make it faster. I think sending larger packets would make it faster( If I overcome issue 1).

3: After I get the checksum acknowledgement, I send

COMMAND_GET_STATUS

packet, as the documentation specifies. But I never get an ack from the bootloader, irrespective of my packet size.

over 10 years ago

0 Amit Ashara over 10 years ago

TI__Guru**** 244440 points

Hello Praveen,

What is the SPI Slave configuration done as besides the Baud Rate. Did you try to change the system clock to 80Mhz and then use the 3 Mhz on the SPI Slave?

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

The data format is set to SSI_FRF_MOTO_MODE_0. At the master' s side, I use a standard linux SPI driver with the following parameters.
speed = 3000000
delay = 100

I also found that if I send the COMMAND_DOWNLOAD twice, the data gets written on the flash. Is there a limit on the packet size that could be sent?
I tried increasing the packet size to contain 128 and 240 bytes. I got a bunch of NAKs from the bootloader.

There was no conisderable difference in the performance at 80Mhz.( Also, we can't run the controller at 80 Mhz due to our power requirements).

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

The COMMAND_DOWNLOAD is a 9 byte packet. 1 for command, 4 for the Program Address and 4 for the Data Size. Earlier you mentioned 11 bytes of meta data. Could you check on that?

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Shouldn't I prepend message size and checksum to the COMMAND_DOWNLOAD packet? This makes it a 11 byte packet.

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

Yes, you are right. The size and checksum are to be prepend on the actual data. If you put a break point in the bl_main.c what does the switch case statement show on the 1st Download command?

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Since, I am using the TIVA ROM bootloader I can't use the debugger. The documentation says that the BUFFER_SIZE is 20. Is there a way to change this parameter on the ROM bootloader?

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

You can instead use the Flash based version of the same. That will allow for debug. To do so you may need to import the example like boot_serial, change the start address of the binary image to 0x2800 instead of 0x0 (this can be done in the IDE during linker)

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Amit,

Before I do that, I want to let you know that the first download command gets received correctly. I get the ack back and I also see that the flash gets cleared.

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

But what happens when you send the first data packet. Does that get programmed (minus the location 0x0 and 0x4)?

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Amit,

So if I send the data packet after the first download command, data is not written into flash. The same packet after the second download commad gets written .(Except for location 0x0 & 0x4, which are written last)

The other thing I found was if I send the packet one byte at a time, the flash gets written after the first download command. This happens irrespective of the packet size.

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

The data is sent with the SEND_DATA command and not the DOWNLOAD command.

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

I know. When I said I was sending data, I was using SEND_DATA command. I think I am following the protocol correctly here, beacause I can download the program correctly if the packets are trasnsmitted one byte at a time. Unfortunatley, this method consumes lot of CPU and time on my master device which I can't afford.
To repeat again, one of my problems is the difference in behaviour when a packet (11 bytes) is transmitted all together and when it is transmitted one byte at a time. I'll try to make the behaviour more clearer.

Step 1: I send the download command with the starting address and image length. I get the ack for it and I also see that the flash also gets cleared.
Step 2: When I transmit the packet(11 bytes) all together using the send command, I get a success ACK, but nothing gets written on the flash. I did try different packet sizes(11,19,35,67,131,243).

But, instead of step 2, if I send the packet one byte at a time, I get the ack and the data is correctly written on the flash.

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen

I understood your point. What is the minimum inter byte gap of a packet which allows programming. Secondly getting the SSI boot loader in flash will give us vital debug information.

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Amit,

What do you mean by inter byte gap? Also, what are the steps that I should follow after I import the boot_serial example?

Praveen

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen,

When you send one byte after another, the code works. The CS may be toggling. The time between two bytes where CS is high is called the inter byte gap. On the other hand when you send it in a burst does the CS toggle? If not then can you ensure that CS is toggled between two bytes. If yes, then increase the time for which CS is held high before the next byte.

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Amit,

Thank you. I got it working. I had to change SPI operation protocol to mode 3 :-). Right now, each of my send_data packet contains 240 bytes of data (which is working fine). Do you think that the TIVA can handle this packet load at 40 Mhz reliably or should I reduce the packet size?

Praveen

0 Amit Ashara over 10 years ago in reply to Praveen Batapati

TI__Guru**** 244440 points

Hello Praveen.

The TM4C SSI Slave can work at most at 1/12 of the system clock. So as long as the SSICLK is less than 1/12 of the system clock it would be OK.

Regards
Amit

0 Praveen Batapati over 10 years ago in reply to Amit Ashara

Intellectual 270 points

Great !!. Thanks for all the help. :-)

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TIVA software update using SPI