We
are using the DRV8432 as shown in datasheet figure 12, with a GND sense
resistor, but with two separate motor channels operated in bridge mode.
We are driving a very low inertia motor in a haptics application, with
low friction. We differentially sense the current from the two bridge
GND legs. When we command zero current, there is inevitably some
amplifier offset due to sense resistor tolerance, other tolerances,
etc... We zero this out. However, we have noticed that the zero point drifts as the DRV8432
warms up.
We have instrumented the system in several ways and
have pretty much ruled out that this drift is coming from either the current sense resistors or the sense amplifier. It is real! What
seems to be happening is that there is additional current from other
circuit elements that is not equal for the two bridge legs, and that
this current drifts over time/temperature. This probably wouldn't show
up in most motor control applications b/c there is enough friction and
inertia that the small offset current change wouldn't be observable. In
our low friction haptics application, though, we can observe this, and the motors
move slightly.
We are interested in learning:
- whether this problem has been observed by TI or by other TI customers.
- if this problem exists on all chip versions (sometimes parts are improved after their initial release).
- what output circuitry, if any, is connected to the power GND pins and, in particular, whether the output MOSFET drive circuit current also returns through these pins. This is mainly important in corroborating our observations and hypotheses, but also would be helpful in evaluating other approaches should we need to implement the current sense circuit differently. For example, would there be any reason to expect a similar issue to appear were we to sense the MOSFET high legs? (e.g., do the output driver return currents appear through this leg).
Finally, we have one question regarding the DRV8432 that is apart from this issue...We have a power supply "watchdog" function that cuts off the PVDD power in the event of a processor upset. We'd like to confirm that no chip damage can occur from operating the chip with this supply removed.
Thanks in advance for your help.