BOOSTXL-DRV8323RS: Write operation, register values have changed

Neal Zhu

Part Number: BOOSTXL-DRV8323RS
Other Parts Discussed in Thread: DRV8320, DRV832X, BOOSTXL-DRV8320RS, LAUNCHXL-F280025C,

1.Read register is OK, if not write register,the registers read out are the default values when they are not set. The register values are as follows:

2.However, when writing，For example, according to the previous routine, I only changed the two parameters of register 5 (as shown in the red box below), and almost all the register values changed,

To see which side caused it, I added two breakpoints (the blue arrow).

3.Next, continue to run the code. As expected, the read register value should also be the register value in step 2, but the actual register value is as follows:

It can be seen that almost all the register values have changed. I don't know why?

4. So I was in drv8320_ writeData(ETV_ Four variables are added to handle, & drvspi8320vars) to record whether the parameters written to 2, 3, 4 and 5 register values are correct or not. After running the code, it is shown in the figure below,

The variable value is consistent with that in step 2, which means drv8320_ The entry parameters of writespi (handle, drvregaddr, drvdatanew) are correct,

But there will be a problem after write. I don't know where the problem is?

The waveforms written to registers 2, 3, 4 and 5 are as follows

Thanks！

over 4 years ago

0 Aaron Barrera over 4 years ago

TI__Mastermind 26046 points

Hi Neal,

Please check out our E2E FAQ on SPI Configuration on Use: https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/937258/faq-spi-configuration-and-use?tisearch=e2e-sitesearch&keymatch=faq%3atrue

Did the device lose power or did the bus voltage dip below UVLO at any point? This condition would cause the DRV832x to restore all the default values in SPI. Are you spinning the motor as you are writing/reading?

Thanks,
Aaron

0 Neal Zhu over 4 years ago in reply to Aaron Barrera

Expert 2470 points

Hi Aaron,

NO, the bus voltage is powered by a steady 24V voltage,it is impossible to lose power or bus voltage dip below UVLO at any point.

It is normal and right that I read the default value without any writing operation after powering up.The question is that after I read the default value ,I change some bits,then,I write the changed value into drv8323s,but the reading result is wrong.

The demo code I referred to is 280049’s project which communicates with DRV8320RS,I think the difference is little between 280049 and 280025 at least in spi and their max core speed and LSPCLK’configuration is same.

I suspect that I ignore some little detail in my software code,please check every detail and step which is described in my former emails.I would appreciate that you can give me help.

Thanks!

0 Aaron Barrera over 4 years ago in reply to Neal Zhu

TI__Mastermind 26046 points

Hi Neal,

The SPI code for BOOSTXL-DRV8320RS is written in the HAL layer and was implemented by the C2000 team. The HAL layer code for MotorControl SDK is implemented for F280049C. Are you using F280025? This is a newer device and the C2000 team would be able to help discern differences between the two MCUs to implement SPI for the DRV832x.

Thanks,
Aaron

0 Neal Zhu over 4 years ago in reply to Aaron Barrera

Expert 2470 points

Hi Aaron，

Thank you very much.It’s really an exciting news for me.Yes,I am using 280025 and DRV8323RS.From the datasheet of DRV8323RS,I found DRV8323RS has one more register than DRV8320RS,but the other six registers’ addresses are same.So I think DRV8320RS’ driver is applicable for DRV8323RS,I think I can implement the DRV8320RS’s driver from“Lab 07 - Speed mode and tuning speed PI” in C2000 MotorControl SDK to test DRV8323RS preliminarily.

Now,I have implemented DRV8320RS’s driver into my 280025 project. Becuase I don’t want to use guicomposer to configurate DRV8323RS,and also it wouldn’t be applicable for 280025.So have cut the hal layer code,I want 280025 to communicate with DRV8323RS directly without through hal layer.The attachment files are my demo code which modified from “Lab 07 - Speed mode and tuning speed PI”.I think I can read and write the former six registers.But I meet writing questions as former description.

The code files’ details are as below description:

c,SPIIf.h:SPI Interface configuration;
c, DRV8320RS.h:Complex device driver;
c: DRV8323RS’s initialization,reading and writing operation code.

I would appreciate If you can check my code and help me find where I ignored and made mistakes.You can also provide a demo code for 280025 to drive DRV8323RS and teach me to implement it.

Fullscreen DRV8320RS.c Download

//#############################################################################
// $TI Release: MotorControl SDK v3.01.00.00 $
// $Release Date: Mon Jan 11 11:23:03 CST 2021 $
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//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//! \file   solutions/boostxl_drv8320rs/f28004x/drivers/source/drv8320.c
//! \brief  Contains the various functions related to the DRV8320 object
//!

// **************************************************************************
// the includes

#include <math.h>

// **************************************************************************
// drivers
#include "DRV8320RS.h"

// **************************************************************************
// modules

// **************************************************************************
// platforms

// **************************************************************************
// the defines

// **************************************************************************
// the globals

// **************************************************************************
// the function prototypes
uint16_t drvDataNew_Reg02;
uint16_t drvDataNew_Reg03;
uint16_t drvDataNew_Reg04;
uint16_t drvDataNew_Reg05;



void setup_DriverIf(DRV8320_Handle handle)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;
    //ETV_handle->spiHandle = SPIA_BASE;
    //ETV_handle->gpioNumber_CS = DRV_SPI_CS_GPIO;
    //ETV_handle->gpioNumber_EN = DRV_EN_GATE_GPIO;
    obj->spiHandle = SPIA_BASE;
    obj->gpioNumber_CS = DRV_SPI_CS_GPIO;
    obj->gpioNumber_EN = DRV_EN_GATE_GPIO;

    return;
}

void DRV8320_enable(DRV8320_Handle handle)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;
    volatile uint16_t enableWaitTimeOut;
    uint16_t n = 0;

    // Enable the DRV8320
    GPIO_writePin(obj->gpioNumber_EN, 1);

    enableWaitTimeOut = 0;

    // Make sure the FAULT bit is not set during startup
    while(((DRV8320_readSPI(handle, DRV8320_ADDRESS_STATUS_0) &
            DRV8320_STATUS00_FAULT_BITS) != 0) && (enableWaitTimeOut < 1000))
    {
        if(++enableWaitTimeOut > 999)
        {
            obj->enableTimeOut = true;
        }
    }

    // Wait for the DRV8320 to go through start up sequence
    for(n = 0; n < 0xffff; n++)
    {
        __asm(" NOP");
    }

    return;
} // end of DRV8320_enable() function

DRV8320_Handle DRV8320_init(void *pMemory)
{
    DRV8320_Handle handle;

    // assign the handle
    handle = (DRV8320_Handle)pMemory;

    DRV8320_resetRxTimeout(handle);
    DRV8320_resetEnableTimeout(handle);

    return(handle);
} // end of DRV8320_init() function


DRV8320_CTRL03_PeakSourCurHS_e DRV8320_getPeakSourCurHS(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_3);

    // mask the bits
    data &= DRV8320_CTRL03_IDRIVEP_HS_BITS;

    return((DRV8320_CTRL03_PeakSourCurHS_e)data);
} // end of DRV8320_getPeakSourCurHS function

DRV8320_CTRL03_PeakSinkCurHS_e DRV8320_getPeakSinkCurHS(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_3);

    // mask the bits
    data &= DRV8320_CTRL03_IDRIVEN_HS_BITS;

    return((DRV8320_CTRL03_PeakSinkCurHS_e)data);
} // end of DRV8320_getPeakSinkCurHS function

DRV8320_CTRL04_PeakTime_e DRV8320_getPeakSourTime(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8320_CTRL04_TDRIVE_BITS;

    return((DRV8320_CTRL04_PeakTime_e)data);
} // end of DRV8320_getPeakSourTime function

DRV8320_CTRL04_PeakSourCurLS_e DRV8320_getPeakSourCurLS(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8320_CTRL04_IDRIVEP_LS_BITS;

    return((DRV8320_CTRL04_PeakSourCurLS_e)data);
} // end of DRV8320_getPeakSourCurLS function

DRV8320_CTRL04_PeakSinkCurLS_e DRV8320_getPeakSinkCurLS(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8320_CTRL04_IDRIVEN_LS_BITS;

    return((DRV8320_CTRL04_PeakSinkCurLS_e)data);
} // end of DRV8320_getPeakSinkCurLS function

/*
DRV8320_CTRL04_PeakSinkTime_e DRV8320_getPeakSinkTime(DRV8320_Handle handle)
{
  uint16_t data;

  // read data
  data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_4);

  // mask the bits
  data &= DRV8320_CTRL04_TDRIVE_BITS;

  return((DRV8320_CTRL04_PeakSinkTime_e)data);
} // end of DRV8320_getPeakSinkTime function
*/

DRV8320_CTRL05_OcpDeg_e DRV8320_getVDSDeglitch(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_5);

    // mask the bits
    data &= DRV8320_CTRL05_OCP_DEG_BITS;

    return((DRV8320_CTRL05_OcpDeg_e)data);
} // end of DRV8320_getVDSDeglitch function

/*
DRV8320_CTRL07_VDSBlanking_e DRV8320_getVDSBlanking(DRV8320_Handle handle)
{
  uint16_t data;

  // read data
  data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_7);

  // mask the bits
  data &= DRV8320_CTRL07_TBLANK_BITS;

  return((DRV8320_CTRL07_VDSBlanking_e)data);
} // end of DRV8320_getVDSBlanking function
*/

DRV8320_CTRL05_DeadTime_e DRV8320_getDeadTime(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_5);

    // mask the bits
    data &= DRV8320_CTRL05_DEAD_TIME_BITS;

    return((DRV8320_CTRL05_DeadTime_e)data);
} // end of DRV8320_getDeadTime function

DRV8320_CTRL02_PWMMode_e DRV8320_getPWMMode(DRV8320_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8320_readSPI(handle, DRV8320_ADDRESS_CONTROL_2);

    // mask the bits
    data &= DRV8320_CTRL02_PWM_MODE_BITS;

    return((DRV8320_CTRL02_PWMMode_e)data);
} // end of DRV8320_getPWMMode function

void DRV8320_setSPIHandle(DRV8320_Handle handle, uint32_t spiHandle)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;

    // initialize the serial peripheral interface object
    obj->spiHandle = spiHandle;

    return;
} // end of DRV8320_setSPIHandle() function

void DRV8320_setGPIOCSNumber(DRV8320_Handle handle, uint32_t gpioNumber)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;

    // initialize the gpio interface object
    obj->gpioNumber_CS = gpioNumber;

    return;
} // end of DRV8320_setGPIOCSNumber() function

void DRV8320_setGPIONumber(DRV8320_Handle handle, uint32_t gpioNumber)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;

    // initialize the gpio interface object
    obj->gpioNumber_EN = gpioNumber;

    return;
} // end of DRV8320_setGPIONumber() function

void DRV8320_setupSPI(DRV8320_Handle handle,
                      DRV8320_SPIVars_t *drv8320SPIVars)
{
    DRV8320_Address_e drvRegAddr;
    uint16_t drvDataNew;

    // Set Default Values
    // Manual Read/Write
    drv8320SPIVars->manReadAddr  = 0;
    drv8320SPIVars->manReadData  = 0;
    drv8320SPIVars->manReadCmd = false;
    drv8320SPIVars->manWriteAddr = 0;
    drv8320SPIVars->manWriteData = 0;
    drv8320SPIVars->manWriteCmd = false;

    // Read/Write
    drv8320SPIVars->readCmd  = false;
    drv8320SPIVars->writeCmd = false;

    // Read registers for default values
    // Read Status Register 0
    drvRegAddr = DRV8320_ADDRESS_STATUS_0;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Stat_Reg_00.VDS_LC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_HC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_LB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LB_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_HB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HB_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_LA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LA_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_HA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HA_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.OTSD    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_OTSD_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.UVLO    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_UVLO_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.GDF     = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_GDF_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.VDS_OCP = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_OCP_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_00.FAULT   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_FAULT_BITS)?1:0;

    // Read Status Register 1
    drvRegAddr = DRV8320_ADDRESS_STATUS_1;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Stat_Reg_01.VGS_LC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.VGS_HC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.VGS_LB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LB_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.VGS_HB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HB_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.VGS_LA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LA_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.VGS_HA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HA_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.CPUV    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_CPUV_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.OTW     = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_OTW_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.SC_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SC_OC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.SB_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SB_OC_BITS)?1:0;
    drv8320SPIVars->Stat_Reg_01.SA_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SA_OC_BITS)?1:0;

      // Read Control Register 2
    drvRegAddr = DRV8320_ADDRESS_CONTROL_2;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Ctrl_Reg_02.CLR_FLT  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_CLR_FLT_BITS);
    drv8320SPIVars->Ctrl_Reg_02.BRAKE    = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_BRAKE_BITS);
    drv8320SPIVars->Ctrl_Reg_02.COAST    = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_COAST_BITS);
    drv8320SPIVars->Ctrl_Reg_02.PWM1_DIR = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM1_DIR_BITS);
    drv8320SPIVars->Ctrl_Reg_02.PWM1_COM = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM1_COM_BITS);
    drv8320SPIVars->Ctrl_Reg_02.PWM_MODE = (DRV8320_CTRL02_PWMMode_e)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM_MODE_BITS);
    drv8320SPIVars->Ctrl_Reg_02.OTW_REP  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_OTW_REP_BITS);
    drv8320SPIVars->Ctrl_Reg_02.DIS_GDF  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_DIS_GDF_BITS);
    drv8320SPIVars->Ctrl_Reg_02.DIS_CPUV = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_DIS_CPUV_BITS);
    drv8320SPIVars->Ctrl_Reg_02.CTRL02_RSV1 = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_RESERVED1_BITS)?1:0;

    // Read Control Register 3
    drvRegAddr = DRV8320_ADDRESS_CONTROL_3;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Ctrl_Reg_03.IDRIVEN_HS  = (DRV8320_CTRL03_PeakSinkCurHS_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_IDRIVEN_HS_BITS);
    drv8320SPIVars->Ctrl_Reg_03.IDRIVEP_HS  = (DRV8320_CTRL03_PeakSourCurHS_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_IDRIVEP_HS_BITS);
    drv8320SPIVars->Ctrl_Reg_03.LOCK        = (DRV8320_CTRL03_Lock_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_LOCK_BITS);

    // Read Control Register 4
    drvRegAddr = DRV8320_ADDRESS_CONTROL_4;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Ctrl_Reg_04.IDRIVEN_LS  = (DRV8320_CTRL04_PeakSinkCurLS_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_IDRIVEN_LS_BITS);
    drv8320SPIVars->Ctrl_Reg_04.IDRIVEP_LS  = (DRV8320_CTRL04_PeakSourCurLS_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_IDRIVEP_LS_BITS);
    drv8320SPIVars->Ctrl_Reg_04.TDRIVE      = (DRV8320_CTRL04_PeakTime_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_TDRIVE_BITS);
    drv8320SPIVars->Ctrl_Reg_04.CBC         = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL04_CBC_BITS)?1:0;

    // Read Control Register 5
    drvRegAddr = DRV8320_ADDRESS_CONTROL_5;
    drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
    drv8320SPIVars->Ctrl_Reg_05.VDS_LVL     = (DRV8320_CTRL05_VDSLVL_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_VDS_LVL_BITS);
    drv8320SPIVars->Ctrl_Reg_05.OCP_DEG     = (DRV8320_CTRL05_OcpDeg_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_OCP_DEG_BITS);
    drv8320SPIVars->Ctrl_Reg_05.OCP_MODE    = (DRV8320_CTRL05_OcpMode_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_OCP_MODE_BITS);
    drv8320SPIVars->Ctrl_Reg_05.DEAD_TIME   = (DRV8320_CTRL05_DeadTime_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_DEAD_TIME_BITS);
    drv8320SPIVars->Ctrl_Reg_05.TRETRY      = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL05_TRETRY_BITS);

    return;
} // end of DRV8320_setupSPI() function

uint16_t DRV8320_readSPI(DRV8320_Handle handle,
                         const DRV8320_Address_e regAddr)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;
    uint16_t ctrlWord;
    uint16_t n;
    const uint16_t data = 0;
    volatile uint16_t readWord;
    volatile uint16_t WaitTimeOut = 0;

    volatile SPI_RxFIFOLevel RxFifoCnt = SPI_FIFO_RXEMPTY;

    // build the control word
    ctrlWord = (uint16_t)DRV8320_buildCtrlWord(DRV8320_CTRLMODE_READ, regAddr, data);

    // reset the Rx fifo pointer to zero
    SPI_resetRxFIFO(obj->spiHandle);
    SPI_enableFIFO(obj->spiHandle);

    //GPIO_writePin(obj->gpioNumber_CS, 0);

    // wait for registers to update
    for(n = 0; n < 0x06; n++)
    {
        __asm(" NOP");
    }

    // write the command
    SPI_writeDataBlockingNonFIFO(obj->spiHandle, ctrlWord);

    // wait for two words to populate the RX fifo, or a wait timeout will occur
    while(RxFifoCnt < SPI_FIFO_RX1)
    {
        RxFifoCnt = SPI_getRxFIFOStatus(obj->spiHandle);

        if(++WaitTimeOut > 0xfffe)
        {
            obj->rxTimeOut = true;
        }
    }

    WaitTimeOut = 0xffff;

    //GPIO_writePin(obj->gpioNumber_CS, 1);

    // Read the word
    readWord = SPI_readDataNonBlocking(obj->spiHandle);

    return(readWord & DRV8320_DATA_MASK);
} // end of DRV8320_readSPI() function


void DRV8320_writeSPI(DRV8320_Handle handle, const DRV8320_Address_e regAddr,
                      const uint16_t data)
{
    DRV8320_Obj *obj = (DRV8320_Obj *)handle;
    uint16_t ctrlWord;
    uint16_t n;

    // build the control word
    ctrlWord = (uint16_t)DRV8320_buildCtrlWord(DRV8320_CTRLMODE_WRITE, regAddr, data);

    // reset the Rx fifo pointer to zero
    SPI_resetRxFIFO(obj->spiHandle);
    SPI_enableFIFO(obj->spiHandle);

    //GPIO_writePin(obj->gpioNumber_CS, 0);

    // wait for GPIO
    for(n = 0; n < 0x06; n++)
    {
        __asm(" NOP");
    }

    // write the command
    SPI_writeDataBlockingNonFIFO(obj->spiHandle, ctrlWord);

    // wait for registers to update
    for(n = 0; n < 0x40; n++)
    {
        __asm(" NOP");
    }

    //GPIO_writePin(obj->gpioNumber_CS, 1);

    return;
}  // end of DRV8320_writeSPI() function



void DRV8320_writeData(DRV8320_Handle handle, DRV8320_SPIVars_t *drv8320SPIVars)
{
    DRV8320_Address_e drvRegAddr;
    uint16_t drvDataNew;

    if(drv8320SPIVars->writeCmd)
    {
        // Write Control Register 2
        drvRegAddr = DRV8320_ADDRESS_CONTROL_2;
        drvDataNew = (drv8320SPIVars->Ctrl_Reg_02.CLR_FLT << 0)  | \
                     (drv8320SPIVars->Ctrl_Reg_02.BRAKE << 1)    | \
                     (drv8320SPIVars->Ctrl_Reg_02.COAST <<2)     | \
                     (drv8320SPIVars->Ctrl_Reg_02.PWM1_DIR << 3) | \
                     (drv8320SPIVars->Ctrl_Reg_02.PWM1_COM << 4) | \
                     (drv8320SPIVars->Ctrl_Reg_02.PWM_MODE)      | \
                     (drv8320SPIVars->Ctrl_Reg_02.OTW_REP << 7)  | \
                     (drv8320SPIVars->Ctrl_Reg_02.DIS_GDF << 8)  | \
                     (drv8320SPIVars->Ctrl_Reg_02.DIS_CPUV <<9)  | \
                     (drv8320SPIVars->Ctrl_Reg_02.CTRL02_RSV1 << 10);
        DRV8320_writeSPI(handle, drvRegAddr, drvDataNew);
        drvDataNew_Reg02 = drvDataNew;

        // Write Control Register 3
        drvRegAddr = DRV8320_ADDRESS_CONTROL_3;
        drvDataNew = (drv8320SPIVars->Ctrl_Reg_03.IDRIVEN_HS) | \
                     (drv8320SPIVars->Ctrl_Reg_03.IDRIVEP_HS) | \
                     (drv8320SPIVars->Ctrl_Reg_03.LOCK);
        DRV8320_writeSPI(handle, drvRegAddr, drvDataNew);
        drvDataNew_Reg03 = drvDataNew;

        // Write Control Register 4
        drvRegAddr = DRV8320_ADDRESS_CONTROL_4;
        drvDataNew = (drv8320SPIVars->Ctrl_Reg_04.IDRIVEN_LS) | \
                     (drv8320SPIVars->Ctrl_Reg_04.IDRIVEP_LS) | \
                     (drv8320SPIVars->Ctrl_Reg_04.TDRIVE) | \
                     (drv8320SPIVars->Ctrl_Reg_04.CBC << 10);
        DRV8320_writeSPI(handle, drvRegAddr, drvDataNew);
        drvDataNew_Reg04 = drvDataNew;

        // Write Control Register 5
        drvRegAddr = DRV8320_ADDRESS_CONTROL_5;
        drvDataNew = (drv8320SPIVars->Ctrl_Reg_05.VDS_LVL)      | \
                     (drv8320SPIVars->Ctrl_Reg_05.OCP_DEG)      | \
                     (drv8320SPIVars->Ctrl_Reg_05.OCP_MODE)     | \
                     (drv8320SPIVars->Ctrl_Reg_05.DEAD_TIME)    | \
                     (drv8320SPIVars->Ctrl_Reg_05.TRETRY << 10);
        DRV8320_writeSPI(handle, drvRegAddr, drvDataNew);
        drvDataNew_Reg05 = drvDataNew;

        drv8320SPIVars->writeCmd = false;
    }

    // Manual write to the DRV8320
    if(drv8320SPIVars->manWriteCmd)
    {
        // Custom Write
        //drv8320SPIVars->manWriteAddr = 0x05;
        drvRegAddr = (DRV8320_Address_e)(drv8320SPIVars->manWriteAddr << 11);
        //drv8320SPIVars->manWriteData = 0x7FF;
        drvDataNew = drv8320SPIVars->manWriteData;
        DRV8320_writeSPI(handle, drvRegAddr, drvDataNew);

        drv8320SPIVars->manWriteCmd = false;
    }

    return;
}  // end of DRV8320_writeData() function

void DRV8320_readData(DRV8320_Handle handle, DRV8320_SPIVars_t *drv8320SPIVars)
{
    DRV8320_Address_e drvRegAddr;
    uint16_t drvDataNew;

    if(drv8320SPIVars->readCmd)
    {
        // Read registers for default values
        // Read Status Register 0
        drvRegAddr = DRV8320_ADDRESS_STATUS_0;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Stat_Reg_00.VDS_LC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_HC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_LB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LB_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_HB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HB_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_LA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_LA_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_HA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_HA_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.OTSD    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_OTSD_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.UVLO    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_UVLO_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.GDF     = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_GDF_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.VDS_OCP = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_VDS_OCP_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_00.FAULT   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS00_FAULT_BITS)?1:0;

        // Read Status Register 1
        drvRegAddr = DRV8320_ADDRESS_STATUS_1;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Stat_Reg_01.VGS_LC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.VGS_HC  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.VGS_LB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LB_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.VGS_HB  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HB_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.VGS_LA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_LA_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.VGS_HA  = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_VGS_HA_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.CPUV    = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_CPUV_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.OTW     = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_OTW_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.SC_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SC_OC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.SB_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SB_OC_BITS)?1:0;
        drv8320SPIVars->Stat_Reg_01.SA_OC   = (bool)(drvDataNew & (uint16_t)DRV8320_STATUS01_SA_OC_BITS)?1:0;

        // Read Control Register 2
        drvRegAddr = DRV8320_ADDRESS_CONTROL_2;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Ctrl_Reg_02.CLR_FLT  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_CLR_FLT_BITS);
        drv8320SPIVars->Ctrl_Reg_02.BRAKE    = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_BRAKE_BITS);
        drv8320SPIVars->Ctrl_Reg_02.COAST    = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_COAST_BITS);
        drv8320SPIVars->Ctrl_Reg_02.PWM1_DIR = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM1_DIR_BITS);
        drv8320SPIVars->Ctrl_Reg_02.PWM1_COM = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM1_COM_BITS);
        drv8320SPIVars->Ctrl_Reg_02.PWM_MODE = (DRV8320_CTRL02_PWMMode_e)(drvDataNew & (uint16_t)DRV8320_CTRL02_PWM_MODE_BITS);
        drv8320SPIVars->Ctrl_Reg_02.OTW_REP  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_OTW_REP_BITS);
        drv8320SPIVars->Ctrl_Reg_02.DIS_GDF  = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_DIS_GDF_BITS);
        drv8320SPIVars->Ctrl_Reg_02.DIS_CPUV = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_DIS_CPUV_BITS);
        drv8320SPIVars->Ctrl_Reg_02.CTRL02_RSV1 = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL02_RESERVED1_BITS)?1:0;

        // Read Control Register 3
        drvRegAddr = DRV8320_ADDRESS_CONTROL_3;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Ctrl_Reg_03.IDRIVEN_HS  = (DRV8320_CTRL03_PeakSinkCurHS_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_IDRIVEN_HS_BITS);
        drv8320SPIVars->Ctrl_Reg_03.IDRIVEP_HS  = (DRV8320_CTRL03_PeakSourCurHS_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_IDRIVEP_HS_BITS);
        drv8320SPIVars->Ctrl_Reg_03.LOCK        = (DRV8320_CTRL03_Lock_e)(drvDataNew & (uint16_t)DRV8320_CTRL03_LOCK_BITS);

        // Read Control Register 4
        drvRegAddr = DRV8320_ADDRESS_CONTROL_4;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Ctrl_Reg_04.IDRIVEN_LS  = (DRV8320_CTRL04_PeakSinkCurLS_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_IDRIVEN_LS_BITS);
        drv8320SPIVars->Ctrl_Reg_04.IDRIVEP_LS  = (DRV8320_CTRL04_PeakSourCurLS_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_IDRIVEP_LS_BITS);
        drv8320SPIVars->Ctrl_Reg_04.TDRIVE      = (DRV8320_CTRL04_PeakTime_e)(drvDataNew & (uint16_t)DRV8320_CTRL04_TDRIVE_BITS);
        drv8320SPIVars->Ctrl_Reg_04.CBC         = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL04_CBC_BITS)?1:0;

        // Read Control Register 5
        drvRegAddr = DRV8320_ADDRESS_CONTROL_5;
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->Ctrl_Reg_05.VDS_LVL     = (DRV8320_CTRL05_VDSLVL_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_VDS_LVL_BITS);
        drv8320SPIVars->Ctrl_Reg_05.OCP_DEG     = (DRV8320_CTRL05_OcpDeg_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_OCP_DEG_BITS);
        drv8320SPIVars->Ctrl_Reg_05.OCP_MODE    = (DRV8320_CTRL05_OcpMode_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_OCP_MODE_BITS);
        drv8320SPIVars->Ctrl_Reg_05.DEAD_TIME   = (DRV8320_CTRL05_DeadTime_e)(drvDataNew & (uint16_t)DRV8320_CTRL05_DEAD_TIME_BITS);
        drv8320SPIVars->Ctrl_Reg_05.TRETRY      = (bool)(drvDataNew & (uint16_t)DRV8320_CTRL05_TRETRY_BITS);

        drv8320SPIVars->readCmd = false;
    }

    // Manual read from the DRV8320
    if(drv8320SPIVars->manReadCmd)
    {
        // Custom Read
        //drv8320SPIVars->manReadAddr = 0x05;
        drvRegAddr = (DRV8320_Address_e)(drv8320SPIVars->manReadAddr << 11);
        drvDataNew = DRV8320_readSPI(handle, drvRegAddr);
        drv8320SPIVars->manReadData = drvDataNew;

        drv8320SPIVars->manReadCmd = false;
    }

    return;
}  // end of DRV8320_readData() function

// end of file

DRV8320RS.h

Fullscreen SPIIf.c Download

/*
 * SPIIf.c
 *
 *  Created on: 2021��7��5��
 *      Author: hanglu
 */

#include "SPIIf.h"
#include "device.h"


void setup_DriverSPI(uint32_t base)
{
   // Configure SPI pins :
   //  GPIO08 - SPISIMO
   //  GPIO10 - SPISOMI
   //  GPIO09 - SPICLK
   //  GPIO11 - SPICS

    //
    // GPIO08 is the SPISOMIA.
    //
    GPIO_setPinConfig(GPIO_8_SPIA_SIMO);
    GPIO_setPadConfig(8, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(8, GPIO_QUAL_ASYNC);

    //
    // GPIO10 is the SPISOMIA.
    //
    GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
    GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(10, GPIO_QUAL_ASYNC);

    //
    // GPIO09 is the SPICLKA.
    //
    GPIO_setPinConfig(GPIO_9_SPIA_CLK);
    GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(9, GPIO_QUAL_ASYNC);

    //
        // GPIO11 is the SPISTEA.
        //
        GPIO_setPinConfig(GPIO_11_SPIA_STE);
        GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(11, GPIO_QUAL_ASYNC);

    //
    // GPIO11 is the SPICS.
    //
    /*GPIO_setPinConfig(GPIO_11_GPIO11);
    GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(11, GPIO_QUAL_ASYNC);
    GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);*/
    //
   //
   // GPIO11 is the SPISOMIA.
   //
   /*GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
   GPIO_setPadConfig(11, GPIO_PIN_TYPE_PULLUP);
   GPIO_setQualificationMode(11, GPIO_QUAL_ASYNC);

   //
   // GPIO10 is the SPISOMIA.
   //
   GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
   GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);
   GPIO_setQualificationMode(10, GPIO_QUAL_ASYNC);

   //
   // GPIO09 is the SPICLKA.
   //
   GPIO_setPinConfig(GPIO_9_SPIA_CLK);
   GPIO_setPadConfig(9, GPIO_PIN_TYPE_PULLUP);
   GPIO_setQualificationMode(9, GPIO_QUAL_ASYNC);

   //
   // GPIO11 is the SPICS.
   //
   GPIO_setPinConfig(GPIO_8_GPIO8);
   GPIO_setPadConfig(8, GPIO_PIN_TYPE_PULLUP);
   GPIO_setQualificationMode(8, GPIO_QUAL_ASYNC);
   GPIO_setDirectionMode(8, GPIO_DIR_MODE_OUT);*/


        //
        // Must put SPI into reset before configuring it.
        //
        SPI_disableModule(SPIA_BASE);

        //
        // SPI configuration. Use a 2MHz SPICLK and 8-bit word size.
        //
        //SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,SPI_MODE_MASTER, 1000000, 16);
        SPI_setConfig(base, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,SPI_MODE_MASTER, 500000, 16);

        SPI_disableLoopback(base);

        SPI_setEmulationMode(base, SPI_EMULATION_FREE_RUN);

        SPI_enableFIFO(base);

        HWREGH((base)+SPI_O_FFCT) = 0x0018;

        SPI_clearInterruptStatus(base, SPI_INT_TXFF);
        //
        // Configuration complete. Enable the module.
        //
        SPI_enableModule(SPIA_BASE);
        return;
  // Must put SPI into reset before configuring it
 /* SPI_disableModule(base);

  // SPI configuration. Use a 1MHz SPICLK and 16-bit word size. 500kbps
  //SPI_setConfig(base, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,SPI_MODE_MASTER, 400000, 16);
  SPI_setConfig(base, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,SPI_MODE_MASTER, 500000, 16);

  SPI_disableLoopback(base);

  SPI_setEmulationMode(base, SPI_EMULATION_FREE_RUN);

  SPI_enableFIFO(base);

  HWREGH((base)+SPI_O_FFCT) = 0x0018;

  SPI_clearInterruptStatus(base, SPI_INT_TXFF);

  // Configuration complete. Enable the module.
  SPI_enableModule(base);

  return;*/
}  // end of HAL_setupSPIA() function

SPIIf.h

Fullscreen 1780.main.c Download

//#############################################################################
//
// FILE:   ETV_F28002x_main.c
//
// Created on: 2021��6��23��
// Author: luhang
//
//
//#############################################################################
// $TI Release: F28002x Support Library v3.04.00.00 $
// $Release Date: Fri Feb 12 18:58:34 IST 2021 $
// $Copyright:
// Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//
// Included Files
//
#include "DRV8320RS.h"
#include "driverlib.h"
#include "device.h"
#include "board.h"
#include "EPWMIf.h"
#include "ADCIf.h"
#include "ADC_INT.h"
#include "SPIIf.h"


DRV8320_Handle ETV_handle;
DRV8320_SPIVars_t drvSPI8320Vars;
unsigned char HallU_Read;
unsigned char HallV_Read;
unsigned char HallW_Read;
unsigned char DIAG_MCU_Read;

void main(void)
{

    Device_init();//Initialize device clock and peripherals

    Device_initGPIO();//Disable pin locks and enable internal pull-ups.

    Interrupt_initModule();//Initialize PIE and clear PIE registers. Disables CPU interrupts.

    //Initialize the PIE vector table with pointers to the shell Interrupt
    //Service Routines (ISR).
    Interrupt_initVectorTable();
    Interrupt_register(INT_ADCA1, &adcA1ISR);
    //Configure ePWMs
    Board_init();
    //Disable sync(Freeze clock to PWM as well). GTBCLKSYNC is applicable
    //only for multiple core devices. Uncomment the below statement if
    //applicable.
    //
    //SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_GTBCLKSYNC);
    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

    initADC();

    // Initialize ePWM1
    initEPWM(Uphase_BASE);
    initEPWM(Vphase_BASE);
    initEPWM(Wphase_BASE);

    initADCSOC();
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);//Enable sync and clock to PWM

    setup_DriverSPI(SPIA_BASE);
    setup_DriverIf(ETV_handle);
    DRV8320_resetRxTimeout(ETV_handle);
    DRV8320_resetEnableTimeout(ETV_handle);

    DRV8320_enable(ETV_handle);

    DRV8320_setupSPI(ETV_handle, &drvSPI8320Vars);


    drvSPI8320Vars.Ctrl_Reg_05.VDS_LVL = DRV8320_VDS_LEVEL_1P300_V;
    drvSPI8320Vars.Ctrl_Reg_05.DEAD_TIME = DRV8320_DEADTIME_100_NS;

    drvSPI8320Vars.writeCmd = 1;
    DRV8320_writeData(ETV_handle,&drvSPI8320Vars);
    drvSPI8320Vars.readCmd = 1;
    DRV8320_readData(ETV_handle,&drvSPI8320Vars);


    H_L_PWM(Uphase_BASE,0.8);
    //H_L_OFF(Uphase_BASE);
    EPWM_setTimeBaseCounterMode(Uphase_BASE, EPWM_COUNTER_MODE_UP_DOWN);

    Interrupt_enable(INT_ADCA1);
    EINT;//Enable Global Interrupt (INTM) and real time interrupt (DBGM)
    ERTM;

    while(1)
    {


        HallU_Read = GPIO_readPin(228);
        HallV_Read = GPIO_readPin(224);
        HallW_Read = GPIO_readPin(237);
        DIAG_MCU_Read = GPIO_readPin(33);

       // GPIO_writePin(28, 0);
       // GPIO_writePin(29, 0);

       // GPIO_writePin(28, 1);
       // GPIO_writePin(29, 1);


        //
        // Wait while ePWM1 causes ADC conversions which then cause interrupts.
        // When the results buffer is filled, the bufferFull flag will be set.
        //
        /*while(bufferFull == 0)
        {
        }
        bufferFull = 0;     // Clear the buffer full flag

        //
        // Stop ePWM1, disabling SOCA and freezing the counter
        //
        EPWM_disableADCTrigger(EPWM1_BASE, EPWM_SOC_A);
        EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_STOP_FREEZE);

        //
        // Software breakpoint. At this point, conversion results are stored in
        // adcAResults.
        //
        // Hit run again to get updated conversions.
        //
        ESTOP0;*/
    }
}

0 Yanming Luo over 4 years ago in reply to Neal Zhu

TI__Guru** 115480 points

Are you working on the launchxl-f280025c + drv8323rs? Or your own board?

0 Neal Zhu over 4 years ago in reply to Yanming Luo

Expert 2470 points

Yes,I am using “LAUNCHXL-F280025C” boad and “BOOSTXL-DRV8323RS” borad.

1.I connect six signal pins between two boards: Enable(GPIO29),SCLK(GPIO9),SDI/SIMO(GPIO8),SDO/SOMI(GPIO10),CS/STE(GPIO11),GND。

2.The bus voltage（VM） is powered by a steady 24V voltage.

I just want to write and read registers firstly,so I have’t connect other signal pins.I meet writing registers problems as fomer email’s description.

I would appreciate If you can check my code in my former emails and help me find where I ignored and made mistakes.You can also provide a demo code for 280025 to drive DRV8323RS and teach me to implement it.

I am very urgent to solve my problems,please check every details and each description in my former emails. There is time difference between us.I have writed at least three emails to illustrate the same problem. I have waited about five days for useful information. You team can provide me a demo code for 280025 to drive DRV8323RS as well so that I can test and implement directly.

Thanks!

0 Yanming Luo over 4 years ago in reply to Neal Zhu

TI__Guru** 115480 points

You might disconnect IDRIVE and VDS pins and just float these two pins when you connect the boostxl to launchxl. And change the driver files based on DRV8320 that could be able to run the boostxl with launchxl-f28025c.

0 Lu Hang over 4 years ago in reply to Yanming Luo

Prodigy 225 points

Dear Mr Luo:We didn't connect the IDRIVE and VDS pins,We have changed driver files based on DRV8320 to be able to run the boostxl with launchxl-f28025c.The code is shown in the above description.You can check it.We connect six signal pins between two boards:Enable(GPIO29),SCLK(GPIO9),SDI/SIMO(GPIO8),SDO/SOMI(GPIO10),CS/STE(GPIO11),GND。The bus voltage（VM） is powered by a steady 24V voltage.We have suceeded to read default register value after power on.The problemn is once we write the register,almost all the register's value is changed and mostly are cleared to zero.

0 Yanming Luo over 4 years ago in reply to Lu Hang

TI__Guru** 115480 points

Attached files and code for your reference that have been tested on Lauchxl-f280049C and Launchxl-F280025C with boostxl-drv8323RS. Please

Fullscreen drv8323.c Download

//#############################################################################
// $TI Release: MotorControl SDK v3.00.01.00 $
// $Release Date: Tue May 26 19:13:59 CDT 2020 $
// $Copyright:
// Copyright (C) 2017-2019 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
// 
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################

//! \file   solutions/boostxl_drv8323rs/f28004x/drivers/source/drv8323.c
//! \brief  Contains the various functions related to the DRV8323 object
//!

// **************************************************************************
// the includes

#include <math.h>

// **************************************************************************
// drivers
#include "drv8323.h"

// **************************************************************************
// modules

// **************************************************************************
// platforms

// **************************************************************************
// the defines

// **************************************************************************
// the globals

// **************************************************************************
// the function prototypes
void DRV8323_enable(DRV8323_Handle handle)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;
    volatile uint16_t enableWaitTimeOut;
    uint16_t n = 0;

    // Enable the DRV8323
    GPIO_writePin(obj->gpioNumber_EN, 1);

    enableWaitTimeOut = 0;

    // Make sure the FAULT bit is not set during startup
    while(((DRV8323_readSPI(handle, DRV8323_ADDRESS_STATUS_0) &
            DRV8323_STATUS00_FAULT_BITS) != 0) && (enableWaitTimeOut < 1000))
    {
        if(++enableWaitTimeOut > 999)
        {
            obj->enableTimeOut = true;
        }
    }

    // Wait for the DRV8323 to go through start up sequence
    for(n = 0; n < 0xffff; n++)
    {
        __asm(" NOP");
    }

    return;
} // end of DRV8323_enable() function

DRV8323_Handle DRV8323_init(void *pMemory)
{
    DRV8323_Handle handle;

    // assign the handle
    handle = (DRV8323_Handle)pMemory;

    DRV8323_resetRxTimeout(handle);
    DRV8323_resetEnableTimeout(handle);

    return(handle);
} // end of DRV8323_init() function

DRV8323_CTRL03_PeakSourCurHS_e DRV8323_getPeakSourCurHS(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_3);

    // mask the bits
    data &= DRV8323_CTRL03_IDRIVEP_HS_BITS;

    return((DRV8323_CTRL03_PeakSourCurHS_e)data);
} // end of DRV8323_getPeakSourCurHS function

DRV8323_CTRL03_PeakSinkCurHS_e DRV8323_getPeakSinkCurHS(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_3);

    // mask the bits
    data &= DRV8323_CTRL03_IDRIVEN_HS_BITS;

    return((DRV8323_CTRL03_PeakSinkCurHS_e)data);
} // end of DRV8323_getPeakSinkCurHS function

DRV8323_CTRL04_PeakTime_e DRV8323_getPeakSourTime(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8323_CTRL04_TDRIVE_BITS;

    return((DRV8323_CTRL04_PeakTime_e)data);
} // end of DRV8323_getPeakSourTime function

DRV8323_CTRL04_PeakSourCurLS_e DRV8323_getPeakSourCurLS(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8323_CTRL04_IDRIVEP_LS_BITS;

    return((DRV8323_CTRL04_PeakSourCurLS_e)data);
} // end of DRV8323_getPeakSourCurLS function

DRV8323_CTRL04_PeakSinkCurLS_e DRV8323_getPeakSinkCurLS(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_4);

    // mask the bits
    data &= DRV8323_CTRL04_IDRIVEN_LS_BITS;

    return((DRV8323_CTRL04_PeakSinkCurLS_e)data);
} // end of DRV8323_getPeakSinkCurLS function

/*
DRV8323_CTRL04_PeakSinkTime_e DRV8323_getPeakSinkTime(DRV8323_Handle handle)
{
  uint16_t data;

  // read data
  data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_4);

  // mask the bits
  data &= DRV8323_CTRL04_TDRIVE_BITS;

  return((DRV8323_CTRL04_PeakSinkTime_e)data);
} // end of DRV8323_getPeakSinkTime function
*/

DRV8323_CTRL05_OcpDeg_e DRV8323_getVDSDeglitch(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_5);

    // mask the bits
    data &= DRV8323_CTRL05_OCP_DEG_BITS;

    return((DRV8323_CTRL05_OcpDeg_e)data);
} // end of DRV8323_getVDSDeglitch function

/*
DRV8323_CTRL07_VDSBlanking_e DRV8323_getVDSBlanking(DRV8323_Handle handle)
{
  uint16_t data;

  // read data
  data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_7);

  // mask the bits
  data &= DRV8323_CTRL07_TBLANK_BITS;

  return((DRV8323_CTRL07_VDSBlanking_e)data);
} // end of DRV8323_getVDSBlanking function
*/

DRV8323_CTRL05_DeadTime_e DRV8323_getDeadTime(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_5);

    // mask the bits
    data &= DRV8323_CTRL05_DEAD_TIME_BITS;

    return((DRV8323_CTRL05_DeadTime_e)data);
} // end of DRV8323_getDeadTime function

DRV8323_CTRL02_PWMMode_e DRV8323_getPWMMode(DRV8323_Handle handle)
{
    uint16_t data;

    // read data
    data = DRV8323_readSPI(handle, DRV8323_ADDRESS_CONTROL_2);

    // mask the bits
    data &= DRV8323_CTRL02_PWM_MODE_BITS;

    return((DRV8323_CTRL02_PWMMode_e)data);
} // end of DRV8323_getPWMMode function

void DRV8323_setSPIHandle(DRV8323_Handle handle, uint32_t spiHandle)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;

    // initialize the serial peripheral interface object
    obj->spiHandle = spiHandle;

    return;
} // end of DRV8323_setSPIHandle() function

void DRV8323_setGPIOCSNumber(DRV8323_Handle handle, uint32_t gpioNumber)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;

    // initialize the gpio interface object
    obj->gpioNumber_CS = gpioNumber;

    return;
} // end of DRV8323_setGPIOCSNumber() function

void DRV8323_setGPIONumber(DRV8323_Handle handle, uint32_t gpioNumber)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;

    // initialize the gpio interface object
    obj->gpioNumber_EN = gpioNumber;

    return;
} // end of DRV8323_setGPIONumber() function

void DRV8323_setupSPI(DRV8323_Handle handle,
                      DRV8323_SPIVars_t *drv8323SPIVars)
{
    DRV8323_Address_e drvRegAddr;
    uint16_t drvDataNew;

    // Set Default Values
    // Manual Read/Write
    drv8323SPIVars->manReadAddr  = 0;
    drv8323SPIVars->manReadData  = 0;
    drv8323SPIVars->manReadCmd = false;
    drv8323SPIVars->manWriteAddr = 0;
    drv8323SPIVars->manWriteData = 0;
    drv8323SPIVars->manWriteCmd = false;

    // Read/Write
    drv8323SPIVars->readCmd  = false;
    drv8323SPIVars->writeCmd = false;

    // Read registers for default values
    // Read Status Register 0
    drvRegAddr = DRV8323_ADDRESS_STATUS_0;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Stat_Reg_00.VDS_LC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_HC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_LB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LB_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_HB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HB_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_LA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LA_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_HA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HA_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.OTSD    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_OTSD_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.UVLO    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_UVLO_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.GDF     = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_GDF_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.VDS_OCP = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_OCP_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_00.FAULT   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_FAULT_BITS)?1:0;

    // Read Status Register 1
    drvRegAddr = DRV8323_ADDRESS_STATUS_1;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Stat_Reg_01.VGS_LC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.VGS_HC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.VGS_LB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LB_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.VGS_HB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HB_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.VGS_LA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LA_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.VGS_HA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HA_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.CPUV    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_CPUV_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.OTW     = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_OTW_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.SC_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SC_OC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.SB_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SB_OC_BITS)?1:0;
    drv8323SPIVars->Stat_Reg_01.SA_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SA_OC_BITS)?1:0;

      // Read Control Register 2
    drvRegAddr = DRV8323_ADDRESS_CONTROL_2;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Ctrl_Reg_02.CLR_FLT  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_CLR_FLT_BITS);
    drv8323SPIVars->Ctrl_Reg_02.BRAKE    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_BRAKE_BITS);
    drv8323SPIVars->Ctrl_Reg_02.COAST    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_COAST_BITS);
    drv8323SPIVars->Ctrl_Reg_02.PWM1_DIR = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM1_DIR_BITS);
    drv8323SPIVars->Ctrl_Reg_02.PWM1_COM = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM1_COM_BITS);
    drv8323SPIVars->Ctrl_Reg_02.PWM_MODE = (DRV8323_CTRL02_PWMMode_e)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM_MODE_BITS);
    drv8323SPIVars->Ctrl_Reg_02.OTW_REP  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_OTW_REP_BITS);
    drv8323SPIVars->Ctrl_Reg_02.DIS_GDF  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_DIS_GDF_BITS);
    drv8323SPIVars->Ctrl_Reg_02.DIS_CPUV = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_DIS_CPUV_BITS);
    drv8323SPIVars->Ctrl_Reg_02.CTRL02_RSV1 = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_RESERVED1_BITS)?1:0;

    // Read Control Register 3
    drvRegAddr = DRV8323_ADDRESS_CONTROL_3;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Ctrl_Reg_03.IDRIVEN_HS  = (DRV8323_CTRL03_PeakSinkCurHS_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_IDRIVEN_HS_BITS);
    drv8323SPIVars->Ctrl_Reg_03.IDRIVEP_HS  = (DRV8323_CTRL03_PeakSourCurHS_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_IDRIVEP_HS_BITS);
    drv8323SPIVars->Ctrl_Reg_03.LOCK        = (DRV8323_CTRL03_Lock_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_LOCK_BITS);

    // Read Control Register 4
    drvRegAddr = DRV8323_ADDRESS_CONTROL_4;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Ctrl_Reg_04.IDRIVEN_LS  = (DRV8323_CTRL04_PeakSinkCurLS_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_IDRIVEN_LS_BITS);
    drv8323SPIVars->Ctrl_Reg_04.IDRIVEP_LS  = (DRV8323_CTRL04_PeakSourCurLS_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_IDRIVEP_LS_BITS);
    drv8323SPIVars->Ctrl_Reg_04.TDRIVE      = (DRV8323_CTRL04_PeakTime_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_TDRIVE_BITS);
    drv8323SPIVars->Ctrl_Reg_04.CBC         = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL04_CBC_BITS)?1:0;

    // Read Control Register 5
    drvRegAddr = DRV8323_ADDRESS_CONTROL_5;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Ctrl_Reg_05.VDS_LVL     = (DRV8323_CTRL05_VDSLVL_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_VDS_LVL_BITS);
    drv8323SPIVars->Ctrl_Reg_05.OCP_DEG     = (DRV8323_CTRL05_OcpDeg_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_OCP_DEG_BITS);
    drv8323SPIVars->Ctrl_Reg_05.OCP_MODE    = (DRV8323_CTRL05_OcpMode_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_OCP_MODE_BITS);
    drv8323SPIVars->Ctrl_Reg_05.DEAD_TIME   = (DRV8323_CTRL05_DeadTime_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_DEAD_TIME_BITS);
    drv8323SPIVars->Ctrl_Reg_05.TRETRY      = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL05_TRETRY_BITS);

    // Read Control Register 6
    drvRegAddr = DRV8323_ADDRESS_CONTROL_6;
    drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
    drv8323SPIVars->Ctrl_Reg_06.SEN_LVL     = (DRV8323_Ctrl06_SEN_LVL_e)(drvDataNew & (uint16_t)DRV8323_CTRL06_SEN_LVL_BITS);
    drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_C   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_C_BITS);
    drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_B   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_B_BITS);
    drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_A   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_A_BITS);
    drv8323SPIVars->Ctrl_Reg_06.DIS_SEN     = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_DIS_SEN_BITS);
    drv8323SPIVars->Ctrl_Reg_06.CSA_GAIN    = (DRV8323_Ctrl06_CSA_GAIN_e)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_GAIN_BITS);
    drv8323SPIVars->Ctrl_Reg_06.LS_REF      = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_LS_REF_BITS);
    drv8323SPIVars->Ctrl_Reg_06.VREF_DIV    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_VREF_DIV_BITS);
    drv8323SPIVars->Ctrl_Reg_06.CSA_FET     = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_FET_BITS);

    return;
} // end of DRV8323_setupSPI() function

uint16_t DRV8323_readSPI(DRV8323_Handle handle,
                         const DRV8323_Address_e regAddr)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;
    uint16_t ctrlWord;
    uint16_t n;
    const uint16_t data = 0;
    volatile uint16_t readWord;
    volatile uint16_t WaitTimeOut = 0;

    volatile SPI_RxFIFOLevel RxFifoCnt = SPI_FIFO_RXEMPTY;

    // build the control word
    ctrlWord = (uint16_t)DRV8323_buildCtrlWord(DRV8323_CTRLMODE_READ, regAddr, data);

    // reset the Rx fifo pointer to zero
    SPI_resetRxFIFO(obj->spiHandle);
    SPI_enableFIFO(obj->spiHandle);

//  GPIO_writePin(obj->gpioNumber_CS, 0);

    // wait for registers to update
    for(n = 0; n < 0x06; n++)
    {
        __asm(" NOP");
    }

    // write the command
    SPI_writeDataBlockingNonFIFO(obj->spiHandle, ctrlWord);

    // wait for two words to populate the RX fifo, or a wait timeout will occur
    while(RxFifoCnt < SPI_FIFO_RX1)
    {
        RxFifoCnt = SPI_getRxFIFOStatus(obj->spiHandle);

        if(++WaitTimeOut > 0xfffe)
        {
            obj->rxTimeOut = true;
        }
    }

    WaitTimeOut = 0xffff;

//  GPIO_writePin(obj->gpioNumber_CS, 1);

    // Read the word
    readWord = SPI_readDataNonBlocking(obj->spiHandle);

    return(readWord & DRV8323_DATA_MASK);
} // end of DRV8323_readSPI() function


void DRV8323_writeSPI(DRV8323_Handle handle, const DRV8323_Address_e regAddr,
                      const uint16_t data)
{
    DRV8323_Obj *obj = (DRV8323_Obj *)handle;
    uint16_t ctrlWord;
    uint16_t n;

    // build the control word
    ctrlWord = (uint16_t)DRV8323_buildCtrlWord(DRV8323_CTRLMODE_WRITE, regAddr, data);

    // reset the Rx fifo pointer to zero
    SPI_resetRxFIFO(obj->spiHandle);
    SPI_enableFIFO(obj->spiHandle);

    //  GPIO_writePin(obj->gpioNumber_CS, 0);

    // wait for GPIO
    for(n = 0; n < 0x06; n++)
    {
        __asm(" NOP");
    }

    // write the command
    SPI_writeDataBlockingNonFIFO(obj->spiHandle, ctrlWord);

    // wait for registers to update
    for(n = 0; n < 0x40; n++)
    {
        __asm(" NOP");
    }

    //  GPIO_writePin(obj->gpioNumber_CS, 1);

    return;
}  // end of DRV8323_writeSPI() function


void DRV8323_writeData(DRV8323_Handle handle, DRV8323_SPIVars_t *drv8323SPIVars)
{
    DRV8323_Address_e drvRegAddr;
    uint16_t drvDataNew;

    if(drv8323SPIVars->writeCmd)
    {
        // Write Control Register 2
        drvRegAddr = DRV8323_ADDRESS_CONTROL_2;
        drvDataNew = (drv8323SPIVars->Ctrl_Reg_02.CLR_FLT << 0)  | \
                     (drv8323SPIVars->Ctrl_Reg_02.BRAKE << 1)    | \
                     (drv8323SPIVars->Ctrl_Reg_02.COAST <<2)     | \
                     (drv8323SPIVars->Ctrl_Reg_02.PWM1_DIR << 3) | \
                     (drv8323SPIVars->Ctrl_Reg_02.PWM1_COM << 4) | \
                     (drv8323SPIVars->Ctrl_Reg_02.PWM_MODE)      | \
                     (drv8323SPIVars->Ctrl_Reg_02.OTW_REP << 7)  | \
                     (drv8323SPIVars->Ctrl_Reg_02.DIS_GDF << 8)  | \
                     (drv8323SPIVars->Ctrl_Reg_02.DIS_CPUV <<9)  | \
                     (drv8323SPIVars->Ctrl_Reg_02.CTRL02_RSV1 << 10);
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        // Write Control Register 3
        drvRegAddr = DRV8323_ADDRESS_CONTROL_3;
        drvDataNew = (drv8323SPIVars->Ctrl_Reg_03.IDRIVEN_HS) | \
                     (drv8323SPIVars->Ctrl_Reg_03.IDRIVEP_HS) | \
                     (drv8323SPIVars->Ctrl_Reg_03.LOCK);
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        // Write Control Register 4
        drvRegAddr = DRV8323_ADDRESS_CONTROL_4;
        drvDataNew = (drv8323SPIVars->Ctrl_Reg_04.IDRIVEN_LS) | \
                     (drv8323SPIVars->Ctrl_Reg_04.IDRIVEP_LS) | \
                     (drv8323SPIVars->Ctrl_Reg_04.TDRIVE) | \
                     (drv8323SPIVars->Ctrl_Reg_04.CBC << 10);
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        // Write Control Register 5
        drvRegAddr = DRV8323_ADDRESS_CONTROL_5;
        drvDataNew = (drv8323SPIVars->Ctrl_Reg_05.VDS_LVL)      | \
                     (drv8323SPIVars->Ctrl_Reg_05.OCP_DEG)      | \
                     (drv8323SPIVars->Ctrl_Reg_05.OCP_MODE)     | \
                     (drv8323SPIVars->Ctrl_Reg_05.DEAD_TIME)    | \
                     (drv8323SPIVars->Ctrl_Reg_05.TRETRY << 10);
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        // Write Control Register 6
        drvRegAddr = DRV8323_ADDRESS_CONTROL_6;
        drvDataNew = (drv8323SPIVars->Ctrl_Reg_06.SEN_LVL)          | \
                     (drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_C << 2)   | \
                     (drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_B << 3)   | \
                     (drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_A << 4)   | \
                     (drv8323SPIVars->Ctrl_Reg_06.DIS_SEN << 5)     | \
                     (drv8323SPIVars->Ctrl_Reg_06.CSA_GAIN)         | \
                     (drv8323SPIVars->Ctrl_Reg_06.LS_REF << 8)      | \
                     (drv8323SPIVars->Ctrl_Reg_06.VREF_DIV << 9)    | \
                     (drv8323SPIVars->Ctrl_Reg_06.CSA_FET << 10);
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        drv8323SPIVars->writeCmd = false;
    }

    // Manual write to the DRV8323
    if(drv8323SPIVars->manWriteCmd)
    {
        // Custom Write
        drvRegAddr = (DRV8323_Address_e)(drv8323SPIVars->manWriteAddr << 11);
        drvDataNew = drv8323SPIVars->manWriteData;
        DRV8323_writeSPI(handle, drvRegAddr, drvDataNew);

        drv8323SPIVars->manWriteCmd = false;
    }

    return;
}  // end of DRV8323_writeData() function

void DRV8323_readData(DRV8323_Handle handle, DRV8323_SPIVars_t *drv8323SPIVars)
{
    DRV8323_Address_e drvRegAddr;
    uint16_t drvDataNew;

    if(drv8323SPIVars->readCmd)
    {
        // Read registers for default values
        // Read Status Register 0
        drvRegAddr = DRV8323_ADDRESS_STATUS_0;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Stat_Reg_00.VDS_LC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_HC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_LB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LB_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_HB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HB_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_LA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_LA_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_HA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_HA_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.OTSD    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_OTSD_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.UVLO    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_UVLO_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.GDF     = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_GDF_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.VDS_OCP = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_VDS_OCP_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_00.FAULT   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS00_FAULT_BITS)?1:0;

        // Read Status Register 1
        drvRegAddr = DRV8323_ADDRESS_STATUS_1;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Stat_Reg_01.VGS_LC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.VGS_HC  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.VGS_LB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LB_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.VGS_HB  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HB_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.VGS_LA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_LA_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.VGS_HA  = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_VGS_HA_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.CPUV    = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_CPUV_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.OTW     = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_OTW_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.SC_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SC_OC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.SB_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SB_OC_BITS)?1:0;
        drv8323SPIVars->Stat_Reg_01.SA_OC   = (bool)(drvDataNew & (uint16_t)DRV8323_STATUS01_SA_OC_BITS)?1:0;

        // Read Control Register 2
        drvRegAddr = DRV8323_ADDRESS_CONTROL_2;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Ctrl_Reg_02.CLR_FLT  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_CLR_FLT_BITS);
        drv8323SPIVars->Ctrl_Reg_02.BRAKE    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_BRAKE_BITS);
        drv8323SPIVars->Ctrl_Reg_02.COAST    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_COAST_BITS);
        drv8323SPIVars->Ctrl_Reg_02.PWM1_DIR = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM1_DIR_BITS);
        drv8323SPIVars->Ctrl_Reg_02.PWM1_COM = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM1_COM_BITS);
        drv8323SPIVars->Ctrl_Reg_02.PWM_MODE = (DRV8323_CTRL02_PWMMode_e)(drvDataNew & (uint16_t)DRV8323_CTRL02_PWM_MODE_BITS);
        drv8323SPIVars->Ctrl_Reg_02.OTW_REP  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_OTW_REP_BITS);
        drv8323SPIVars->Ctrl_Reg_02.DIS_GDF  = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_DIS_GDF_BITS);
        drv8323SPIVars->Ctrl_Reg_02.DIS_CPUV = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_DIS_CPUV_BITS);
        drv8323SPIVars->Ctrl_Reg_02.CTRL02_RSV1 = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL02_RESERVED1_BITS)?1:0;

        // Read Control Register 3
        drvRegAddr = DRV8323_ADDRESS_CONTROL_3;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Ctrl_Reg_03.IDRIVEN_HS  = (DRV8323_CTRL03_PeakSinkCurHS_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_IDRIVEN_HS_BITS);
        drv8323SPIVars->Ctrl_Reg_03.IDRIVEP_HS  = (DRV8323_CTRL03_PeakSourCurHS_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_IDRIVEP_HS_BITS);
        drv8323SPIVars->Ctrl_Reg_03.LOCK        = (DRV8323_CTRL03_Lock_e)(drvDataNew & (uint16_t)DRV8323_CTRL03_LOCK_BITS);

        // Read Control Register 4
        drvRegAddr = DRV8323_ADDRESS_CONTROL_4;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Ctrl_Reg_04.IDRIVEN_LS  = (DRV8323_CTRL04_PeakSinkCurLS_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_IDRIVEN_LS_BITS);
        drv8323SPIVars->Ctrl_Reg_04.IDRIVEP_LS  = (DRV8323_CTRL04_PeakSourCurLS_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_IDRIVEP_LS_BITS);
        drv8323SPIVars->Ctrl_Reg_04.TDRIVE      = (DRV8323_CTRL04_PeakTime_e)(drvDataNew & (uint16_t)DRV8323_CTRL04_TDRIVE_BITS);
        drv8323SPIVars->Ctrl_Reg_04.CBC         = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL04_CBC_BITS)?1:0;

        // Read Control Register 5
        drvRegAddr = DRV8323_ADDRESS_CONTROL_5;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Ctrl_Reg_05.VDS_LVL     = (DRV8323_CTRL05_VDSLVL_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_VDS_LVL_BITS);
        drv8323SPIVars->Ctrl_Reg_05.OCP_DEG     = (DRV8323_CTRL05_OcpDeg_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_OCP_DEG_BITS);
        drv8323SPIVars->Ctrl_Reg_05.OCP_MODE    = (DRV8323_CTRL05_OcpMode_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_OCP_MODE_BITS);
        drv8323SPIVars->Ctrl_Reg_05.DEAD_TIME   = (DRV8323_CTRL05_DeadTime_e)(drvDataNew & (uint16_t)DRV8323_CTRL05_DEAD_TIME_BITS);
        drv8323SPIVars->Ctrl_Reg_05.TRETRY      = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL05_TRETRY_BITS);

        // Read Control Register 6
        drvRegAddr = DRV8323_ADDRESS_CONTROL_6;
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->Ctrl_Reg_06.SEN_LVL     = (DRV8323_Ctrl06_SEN_LVL_e)(drvDataNew & (uint16_t)DRV8323_CTRL06_SEN_LVL_BITS);
        drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_C   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_C_BITS);
        drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_B   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_B_BITS);
        drv8323SPIVars->Ctrl_Reg_06.CSA_CAL_A   = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_CAL_A_BITS);
        drv8323SPIVars->Ctrl_Reg_06.DIS_SEN     = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_DIS_SEN_BITS);
        drv8323SPIVars->Ctrl_Reg_06.CSA_GAIN    = (DRV8323_Ctrl06_CSA_GAIN_e)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_GAIN_BITS);
        drv8323SPIVars->Ctrl_Reg_06.LS_REF      = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_LS_REF_BITS);
        drv8323SPIVars->Ctrl_Reg_06.VREF_DIV    = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_VREF_DIV_BITS);
        drv8323SPIVars->Ctrl_Reg_06.CSA_FET     = (bool)(drvDataNew & (uint16_t)DRV8323_CTRL06_CSA_FET_BITS);

        drv8323SPIVars->readCmd = false;
    }

    // Manual read from the DRV8323
    if(drv8323SPIVars->manReadCmd)
    {
        // Custom Read
        drvRegAddr = (DRV8323_Address_e)(drv8323SPIVars->manReadAddr << 11);
        drvDataNew = DRV8323_readSPI(handle, drvRegAddr);
        drv8323SPIVars->manReadData = drvDataNew;

        drv8323SPIVars->manReadCmd = false;
    }

    return;
}  // end of DRV8323_readData() function

// end of file

drv8323.h

The codes below are for Launchxl-F280025C, you just need to change the assigned GPIO for SPI as you mentioned above, and don't configure the GPIO qualification mode to GPIO_QUAL_ASYNC, and try to use a lower SPI clock.

// SPI-CS
GPIO_setPinConfig(GPIO_5_SPIA_STE);
GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(5, GPIO_PIN_TYPE_PULLUP);

//SPIA
//SPI-CLK
GPIO_setPinConfig(GPIO_9_SPIA_CLK);
GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(9, GPIO_PIN_TYPE_STD);

//// SPI-SOMI
GPIO_setPinConfig(GPIO_10_SPIA_SOMI);
GPIO_setDirectionMode(10, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(10, GPIO_PIN_TYPE_PULLUP);

// SPI-SIMO
GPIO_setPinConfig(GPIO_11_SPIA_SIMO);
GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);

void HAL_setupSPIA(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)handle;

// Must put SPI into reset before configuring it
SPI_disableModule(obj->spiHandle[0]);

// SPI configuration. Use a 1MHz SPICLK and 16-bit word size. 500kbps
SPI_setConfig(obj->spiHandle[0], DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
SPI_MODE_MASTER, 400000, 16);

SPI_disableLoopback(obj->spiHandle[0]);

SPI_setEmulationMode(obj->spiHandle[0], SPI_EMULATION_FREE_RUN);

SPI_enableFIFO(obj->spiHandle[0]);
//SPI_setTxDelay(obj->spiHandle[0], 0x0018);
HWREGH((obj->spiHandle[0])+SPI_O_FFCT) = 0x0018;

SPI_clearInterruptStatus(obj->spiHandle[0], SPI_INT_TXFF);

// Configuration complete. Enable the module.
SPI_enableModule(obj->spiHandle[0]);

return;
} // end of HAL_setupSPIA() function

0 Lu Hang over 4 years ago in reply to Yanming Luo

Prodigy 225 points

Mr Luo,Thank you very much,I have sloved my problem.

Motor drivers

Motor drivers forum

BOOSTXL-DRV8323RS: Write operation, register values have changed