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DRV8705-Q1: Solenoid control / Drain resistor

Part Number: DRV8705-Q1

Hi Experts,

Could you help me answering the following questions from a customer?

Question_A:

 

What are the possible disadvantages of the operating mode "MODE = level 4" (Split HS and LS Solenoid Control) with the DRV8705-H. Are there any, or in other words are all diagnostics, protection functions, slew rate setting (IMODE), etc. available and usable as in the other modes?

What is not or only limited available in "MODE = level 4" (features, diagnostics, protection function, ...)?

 

Why is "solenoid" explicitly mentioned?

Is with "MODE =level 4" not also a DC motor with PWM controllable (10-16A).

  

Question_B:

 

The voltage at 'DRAIN' (IC-Pin_28) is used as a "reference" for short circuit/overcurrent detection per Uds of the HS-FET's by the DRV.  +Ubat is directly connected to IC-Pin_28 (DRAIN).

 

I have seen a resistor (100R) at this point in a (different) application.

What is the " judgement" on the part of TI here?

Is a resistor "allowed" here?  If so, what would be the maximum value?

 

Best regards,

Simon

  • Hi Simon,

    Please allows us 24 hours to research your question. Expect a reply from us by 24 hours

  • Hi Simon,

    What are the possible disadvantages of the operating mode "MODE = level 4" (Split HS and LS Solenoid Control) with the DRV8705-H. Are there any, or in other words are all diagnostics, protection functions, slew rate setting (IMODE), etc. available and usable as in the other modes?

    All of the protection features of this device will be available in the split HS and LS solenoid control mode. 

    Why is "solenoid" explicitly mentioned?

    Is with "MODE =level 4" not also a DC motor with PWM controllable (10-16A).

    The reason is that the main application for a split HS and LS configuration is for driving floating solenoids. However, other applications may require to connect the load between the HS and LS FETs of a half-bridge. In the other control modes, the source node of the HS FET and the drain node of the LS FET are connected together. But with MODE=level4, the HS and LS FET can be disconnected allowing for the a load to be connected and the driver to properly switch the FETs.

    What is the " judgement" on the part of TI here?

    Is a resistor "allowed" here?  If so, what would be the maximum value?

    I have not seen a resistor in the DRAIN pin. Can you let me know how it's being used in the application? The DRAIN pin is a voltage sensing pin which has a typical active current of 250µA for 13.5V. My guess is that maybe the resistor is being used for current limiting but the typical current is very low that I don't see a reason why it would be needed. Our recommendation is to not place a resistor in the drain pin unless there is a specific reason for it. If you are planning on adding a resistor, please let me know how and why you need it and I can give advice if the resistor can be added.

    Regards,

    Pablo