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DRV8350S-EVM: Motor drivers forum

Part Number: DRV8350S-EVM
Other Parts Discussed in Thread: LM2596, DRV8350

we are developing a BLDC motor driver card for power tool for drilling application.  motor specifications is 48 VDC 28 amp continuous with hall sensor outputs and peak current is 50 amps. Working duty cycle of the motor will be 50%. We are using 12 volt 7AH battery (3 in series combination ) as power source for the motor and driver for testing purpose. 

driver circuit design consist of drv8350srtvt and atmega8a for generating PWM pulses of 20khz. DRV8350SRTVT  is powered with  lm2596 buck converter. drv8350srtvt is configured for 1xPWM mode with synchronous rectification.

these are the settings programmed in DRv8350srtvt using SPI:

DRIVER CONTROL FILED:

OCP_ACT=0b | DIS_GDUV=0b | DIS_GDF=0b | OTW_REP=0b | PWM_MDOE= 10b | 1xPWM_COM= 0b 

GATE DRIVE HS FIELD

IDRIVEP_HS = 450mA | IDRIVEN_HS = 800mA

GATE DRIVE LS FILED 

CBC = 1b | TDRIVE = 11b | IDRIVEP_LS = 450mA  |  IDRIVEN_LS = 800mA

 all other settings are default values.

problems that we are facing is we can hear the motor trying to start to rotate but then it stops and upon checking the fault registers sometimes GDUV error is flagged or gate drive (c side low ) error is flagged. when there is a GDUV error voltage at VGLS pin drops below 5 volt and whenever there is a gate drive fault (c side low) voltage at VGLS drops to 9.5 volts. In both the cases voltage at VGLS does not recovers back to 11 volts.

for testing purpose PWM duty cycles increases from 0 to 50%  stays on at 50% for 5 seconds and then decreases  back to 0%.

before testing the card with motor we tested it with  3x 60 watts lamp connected in delta configuration and fed the hall sensor inputs from motor at 36 volts, upon rotating the motor manually  each phase was switched as per the given truth table in datasheet.  what could be the reason behind such malfunctions .I have replaced 6 of my drvs. 

BLDC POWER CARD layout 1.pdfdrv circuit.pdf

  • Hi Jayesh,

    Have you reviewed our FAQ about IDRIVE setting: https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/796378/faq-selecting-the-best-idrive-setting-and-why-this-is-essential

    450/800mA seems quite high for driving a single MOSFET. Having too high of an IDRIVE often results in device damage.

    Thanks,

    Matt

  • hi Matt,

    mosfet used is irf540n with qdg of 13nC. ill try out those settings! and i am not using any snubbers in this design because lot of reference designs didn't mention about it. so should i add it  in my future boards? 

    Regards,

    Jayesh

  • Hello Matt,

    I reduced idrive settings and drvs are not getting damaged anymore. motor is also rotating but repeated  gate drive fault occurs at high side mosfets.

    Thanks,

    Jayesh

  • Hello Jayesh,

    I would recommend using the 100mA/200mA setting or lower with your MOSFETs (so that the rise time is >100ns).

    Snubbers are nor required, but they can be helpful to increase the possible slew rate on the board. If there is a large distance between the high-side and low-side MOSFETs, this can cause significant parasitic ringing effects when switching, so you need to slow down the rise and fall time.

    You may want to review this app note: System Design Considerations for High Power Motor Driver Applications

    Thanks,

    Matt

  • Hello Matt,

    I tried all the settings from 50 to 100mA. At lower pwm duty cycle driver works fine but as I increase the duty cycle above 70% gate drive fault occurs repeatedly! At 50mA setting even at 50% duty cycle as the motor starts to rotate gate drive fault occurs and stops the drive.

  • Hi Jayesh,

    If a system has higher parasitic inductance, it may require an even slower rise & fall time. Parasitic inductance is caused by using leaded MOSFETs, long traces between the high-side and low-side MOSFETs, long traces to the sense resistor, the sense resistor being leaded or not, long traces to the supply, and long traces to GND. The placement of snubbers and bypass capacitors help mitigate these parasitic inductances.

    I do see that:

    • you are using leaded MOSFETs
    • You have a long trace from the bulk capacitance to the furthest MOSFET (phase W)
    • You have a long trace from the GND terminal to the furthest MOSFET (phase W)
    • The trace at the far right of the board (top layer is VDRAIN and the bottom layer is GND) does not look wide enough to support significant current, and it is the only trace supplying power & GND to phase V and W.

    I suppose that phase W is quite far removed from the supply & bulk capacitors and does not have any local stabilizing bulk capacitance. This could be causing excessive ringing on the SHx, GHx, GLx, and SLx pins of the DRV835x.

    Thanks,

    Matt

  • hello Matt,

    we are redesigning the board. After the designing part is complete ,can i mail it to you? So that you could suggest me if any further changes are required before pcb design goes   for fabrication.

    Thanks,

    Jayesh

  • Hi Jayesh,

    The best way to contact us is through this forum, if you want to make a new thread asking us to review the new board we will respond to it promptly. Would that be OK?

    Thanks,

    Matt

  • Hi Matt,

    Instead of creating a new thread, is it ok if i post it here ? 

    Thanks,

    Jayesh

  • Sure, no problem

  • Hi Matt,

    Could you please review the layout and suggest to me if any further changes are required. To increase the current capacity we will  be using copper strips from the input point to terminals of the mosfet. I have attached solder side images as well. C bulk caps are located at the bottom side of the board. As you can see , we have tried to  separate the grounds. Will this kind of separation work? 

    Thanks,

    Jayesh

    tec-096-bottom.pdftec-096-top-bottom.pdf

  • Hi Jayesh,

    • We highly recommend *not* to separate the high-side and low-side MOSFETs and to keep them as close together as possible. This is because the trace between the high-side and low-side MOSFET adds a lot of parasitic inductance which is very bad for switching.
    • Placing the MOSFETs very far apart results in extremely long gate drive traces from the DRV8350.
    • The image is not very high resolution, so I cannot confirm the placement and routing of the VCP-VDRAIN, CPH-CPL, VGLS-GND, DVDD-GND. These components need to be placed as close as possible to the DRV8350 with thick traces to the pins.
    • Ground separation is dangerous, because you need to make sure the intended currents through the ground path still have a short loop. For example this loop: VGLS-GND capacitor to the DRV8350 VGLS pin --> GLx pin to the low-side MOSFET gate --> low-side MOSFET source to the VGLS-GND capacitor.

    Thanks,

    Matt

  • I have attached pdfs with higher resolution . We will remove the electrolytic capacitors mounted between the mosfets, It should reduce the gap by 17mm. heatsink space cannot be avoided. The gate drive trace is 1 mm thick.

    Is there any application note that I could refer to decide the amount of bulk capacitors needed at the input  because to reduce the gap between mosfets we will have to remove those big capacitors. 
  • Hi Jayesh,

    • You can make the heatsinks facing the opposite direction so that the MOSFTETs are placed close together (i.e. heatsinks facing from the MOSFET to the outside of the board instead of the inside)
    • Make sure to size down the traces as close to the DRV8350 as possible. It looks like you still have some area where the trace is very thin around the device.
    • Please increase the trace width of the lines to C42, C21, and C22. You can even move R23 and R24 away from the device to get C21 and C22 closer to the DRV8350.
    • When using leaded MOSFETs (high inductance) it is important to add snubbers across each MOSFET to help mitigate the inductance.
    • Make sure to bypass each high-side MOSFET drain to the low-side MOSFET source with a 0.01-1uF capacitor. This can help reduce ringing caused by parasitic inductance from the supply and ground traces.
    • The typical guidance for bulk capacitor sizing is ~2uF/W (watts of motor power). However this is just a rule of thumb

    Thanks,

    Matt

  • Hi Matt,

    thank you for reviewing the board! we will update the  layout and send it to the fab house! 

    Thanks

    Jayesh

  • That's good. Let me know if you need anything else!

    Thanks,

    Matt

  • Hello Matt,

    I am able to drive  the motor at 80% duty and the motor runs ok without any fault . I have connected a  led to the NFAULT pin of the drv8350 ( used 10k pull up resistor ) and at 80% duty the led starts to flicker, but the motor rotates ok . What could be the reason ?

  • Hello Jayesh,

    The device will trip overcurrent if the current is too high (this pulls nFAULT low), but an overcurrent event will be reset if a new PWM edge is coming in (this will make nFAULT go back high). I believe you are tripping cycle-by-cycle overcurrent.

    Thanks,

    Matt