DRV8308EVM: motor Dc controller

/* AG_SEPT: Autogain Setpoint

0000 = 3 Hz, 0001 = 6 Hz, 0010 = 12 Hz, 0011 = 24 Hz, 0100 = 48 Hz, 0101 = 95 Hz

0110 = 191 Hz, 0111 = 382 Hz, 1000 = 763 Hz, 1001 = 1.5 kHz, 1010 = 3 kHz

1011 = 6 kHz, 1100 = 12 kHz, 1101 = 24 kHz, 1110 = 49 kHz, 1111 = 98 kHz*/

void SetDefaultRegisterVals(void)

{

    // CTRL1 Register

    G_CTRL1_REG.Address     = 0x00;

    G_CTRL1_REG.AG_SETPT  = 0x5;  //description above

    G_CTRL1_REG.ENPOL       = 0x0;  //ENABLE pin polarity 0 = Device is active when ENABLE is high, 1 = Device is active when ENABLE is low

    G_CTRL1_REG.DIRPOL      = 0x0;  //DIR pin polarity 0 = Normal DIR pin behavior, 1 = Inversed DIR pin behavior

    G_CTRL1_REG.BRKPOL      = 0x0;  //BRAKE pin polarity  0 = Brake when BRAKE is high, 1 = Brake when BRAKE is low

    G_CTRL1_REG.SYNRECT    = 0x0;   //Synchronous rectification  0 = Disabled, 1 = Enabled

    G_CTRL1_REG.PWMF        = 0x2; //0x1;   //50Khz The PWM frequency used on the external FETs 00 = 25 kHz, 01 = 50 kHz, 10 = 100 kHz, 11 = 200 kHz

    G_CTRL1_REG.SPDMODE   = 0x1;   //Speed control mode  00 = Clock Frequency Mode, 01 = Clock PWM Mode, 10 = Internal Register PWM Mode, 11 = Reserved

    G_CTRL1_REG.FGSEL        = 0x1;//0x1;  //FG select  00 = Use HALL_U to generate FG, 01 = Use XOR of all three Hall sensors, 10 = Use FG amplifier input, 11 = Use TACH input signal

    G_CTRL1_REG.BRKMOD     = 0x1;  //Motor brake mode 0 = Coast when ENABLE is inactive (outputs 3-state), 1 = Brake when ENABLE is inactive (all low-side FETs on)

    G_CTRL1_REG.RETRY        = 0x1; //Retry mode  0 = Latch off in case of fault, 1 = Automatic retry in case of fault

    // ADVANCE Register

    G_ADVANCE_REG.Address    = 0x01;

    G_ADVANCE_REG.ADVANCE   = 32; //0x15 Commutation timing advance versus Hall signals; each count is 1 / 960 the Hall_U period

                                                        //0x08; GK

    // COMCTRL1 Register

    G_COMCTRL1_REG.Address    = 0x02;

    G_COMCTRL1_REG.SPDREVS  = 0x03; //After the MINSPD and SPEEDTH criteria are met, SPDREVS adds a minimum number of Hall_U periods that must occur for LOCK to be set

    G_COMCTRL1_REG.MINSPD    = 0xB4; //180 0xD9 217 GK  Sets the minimum Hall_U period that LOCK can be set; each count is 2.56 ms

    /*SPEEDTH: Speed change tolerance for LOCK

    000 = 1/512 rev (0.20%), 001 = 1/256 rev (0.39%), 010 = 1/128 rev (0.78%)

    011 = 1/64 rev (1.56%), 100 = 1/32 rev (3.13%), 101 = 1/16 rev (6.25%)

    110 = 1/8 rev (12.5%), 111 = 1/4 rev (25%)*/

    // MOD120 Register

    G_MOD120_REG.Address     = 0x03;

    G_MOD120_REG.BASIC        = 0x1; //Basic operation 0 = Normal device operation, 1 = Disables ADVANCE functionality and forces 3-Hall 120° commutation

    G_MOD120_REG.SPEEDTH    = 0x6; //6  description is above

    G_MOD120_REG.MOD120      = 2048; //0xF82; //3970  Scales the input duty cycle in PWM modes

    // DRIVE Register

    G_DRIVE_REG.Address        = 0x04;

    G_DRIVE_REG.LRTIME         = 0x0; //0: 1s, 1: 3s, 2: 5s, 3:10s

    G_DRIVE_REG.HALLRST       = 0x0; //Sets the frequency to reset the Hall commutation counter

                                     //00 = Every Hall_U cycle, 01 = Every 2nd Hall_U cycle, 10 = Every 4th Hall_U cycle, 11 = Every 8th Hall_U cycle

    G_DRIVE_REG.DELAY          = 0x0; //Controls whether ADVANCE leads or lags Hall signals 0 = Commutate before Hall signals arrive, 1 = Commutate after Hall signals arrive

    G_DRIVE_REG.AUTOADV      = 0x1;//0x1;//0x1; //Enables automatic advance compensation  0 = Disabled, 1 = Enabled

    G_DRIVE_REG.AUTOGN        = 0x1; //Enables automatic gain compensation 0 = Disabled, 1 = Enabled

    G_DRIVE_REG.ENSINE         = 0x0; //Enables 180° sine wave current drive  0 = Disabled, 1 = Enabled

    G_DRIVE_REG.TDRIVE         = 0x1; //Predriver high-current drive time 00 = 1 uS, 01 = 5 uS, 10 = 10 uS, 11 = 15 uS

    G_DRIVE_REG.DTIME          = 0x1; //Additional dead time added between high-side and low-side driving (typical) 000 = 60 ns, 001 = 120 ns, 010 = 240 ns, 011 = 500 ns

                                                     //100 = 740 ns, 101 = 1.0 uS, 110 = 1.24 uS, 111 = 1.5 ìs

    G_DRIVE_REG.IDRIVE          = 0x5; //Predriver output peak current 000 = 10 mA, 001 = 20 mA, 010 = 30 mA, 011 = 50 mA, 100 = 90 mA, 101 = 100 mA, 110 = 110 mA

                                                      //111 = 130 mA

    // SPDGAIN Register

    G_SPDGAIN_REG.Address     = 0x05;

    G_SPDGAIN_REG.INTCLK      = 0x6;//0x3; //Integrator clock frequency 000 = 50 MHz, 001 = 25 MHz, 010 = 12.5 MHz, 011 = 6.3 MHz, 100 = 3.1 MHz, 101 = 1.6 MHz,

                                                        //110 = 0.8 MHz, 111 = 0.4 MHz,

    G_SPDGAIN_REG.SPDGAIN    = 10;//0x1;//0x010 GK; //7   Speed compensator gain

    // FILK1 Register

    G_FILK1_REG.Address          = 0x06;

    G_FILK1_REG.HALLPOL         = 0x0;  //Hall polarity 0 = Hall signal logic levels are directly used, 1 = Hall signal logic levels are inverted

    G_FILK1_REG.BYPFILT          = 0x0;  //Bypass the filter that FILK1 and FILK2 configure 0 = Filter is enabled, 1 = Filter is disabled (FILK1 and FILK2 are ignored)

    G_FILK1_REG.FILK1              = 0x3FD;  //0x4B0;  Filter coefficient that sets the pole frequency

                                                //0x4B1 GK

    // FILK2 Register

    G_FILK2_REG.Address         = 0x07;

    G_FILK2_REG.FILK2            = 0x336; //0x336:822;   Filter coefficient that sets the zero frequency

                                                        //0x3BA GK

    // COMPK1 Register

    G_COMPK1_REG.Address      = 0x08;

    G_COMPK1_REG.BYPCOMP    = 0x0;//0x1; //0 GK Bypass the compensator (COMPK1 and COMPK2 are ignored) 0 = Filter is enabled, 1 = Filter is disabled (FILK1 and FILK2 are ignored)

    G_COMPK1_REG.COMPK1      = 0x12C;//0x722;//0x12C; //Compensator coefficient that sets the pole frequency

    /*AA_SETPT: Autoadvance setpoint

    0000 = 3 Hz, 0001 = 6 Hz, 0010 = 12 Hz, 0011 = 24 Hz, 0100 = 48 Hz

    0101 = 95 Hz, 0110 = 191 Hz, 0111 = 382 Hz, 1000 = 763 Hz, 1001 = 1.5 kHz

    1010 = 3 kHz, 1011 = 6 kHz, 1100 = 12 kHz, 1101 = 24 kHz, 1110 = 49 kHz, 1111 = 98 kHz*/

    // COMPK2 Register

    G_COMPK2_REG.Address      = 0x09;

    G_COMPK2_REG.AA_SETPT   = 0x5;//0x5;  //description above  0 GK

    G_COMPK2_REG.COMPK2      = 240;//0x250;//0xFFF;//0x258;  //Compensator coefficient that sets the zero frequency

    // LOOPGN Register

    G_LOOPGN_REG.Address      = 0x0A;

    G_LOOPGN_REG.OCPDEG      = 0x3;  //Overcurrent protection deglitch time to ignore voltage spikes. Controls tOCP and tBLANK.

                                     //00: tocp = 1.6uS, tBLANK = 2uS, 01: tocp = 2.3uS, tBLANK = 3uS, 10: tocp = 3uS, tBLANK = 3.75uS

                                     //11: tocp = 5uS, tBLANK = 6uS

    G_LOOPGN_REG.OCPTH        = 0x3;  //Protection threshold for VFETOCP     00 = 250 mV, 01 = 500 mV, 10 = 750 mV, 11 = 1000 mV

    G_LOOPGN_REG.OVTH         = 0x0;  //Protection threshold for VOVLO 0 = 34.5 V, 1 = 28 V

    G_LOOPGN_REG.VREF_EN    = 0x0;  //Writing this bit over SPI requires ENABLE to be active. 0 = VREG is enabled only when ENABLE is active, 1 = VREG is always enabled

    G_LOOPGN_REG.LOOPGN     = 45;//0x06E; //110 Sets the overall gain for the speed control loop

                                                        //0x2D GK

    // SPEED Register

    G_SPEED_REG.Address   = 0x0B;

    G_SPEED_REG.SPEED     = 0x1F4;   //0x1F4;//0xB4; //GK;//0x1F4; //5DC = 1500, 1F4 = 500  In the Internal Register PWM Mode, SPEED divided by 4095 sets the input duty cycle. In

                                                    //Clock Frequency Mode, SPEED sets the open-loop gain during spin-up before LOCKn goes Low.

    // FAULT Register

    G_FAULT_REG.Address     = 0x2A;

    G_FAULT_REG.VMOV        = 0x0; //Fault: VM overvoltage 0 = Normal, 1 = Fault detected

    G_FAULT_REG.CPFAIL      = 0x0;  //Fault: charge pump undervoltage 0 = Normal, 1 = Fault detected (default on power up)

    G_FAULT_REG.UVLO        = 0x0;  //Fault: VM undervoltage 0 = Normal, 1 = Fault detected (default on power up)

    G_FAULT_REG.OTS         = 0x0;  //Fault: overtemperature shutdown 0 = Normal, 1 = Fault detected

    G_FAULT_REG.CPOC        = 0x0;  //Fault: charge pump overcurrent  0 = Normal,  1 = Fault detected

    G_FAULT_REG.OCP         = 0x0;  //Fault: motor OCP 0 = Normal, 1 = Fault detected

}