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DRV8703-Q1: DRV8703-Q1 : Why VDS(OCP) status register bit act differently if IN1 PWM frequency has been changed

Part Number: DRV8703-Q1

We plan to control our actuator using MODE '0' first

and use 2 mode(Reverse, Forward) only

so, IN2 is fixed as '1' and IN1 will receive 80[khz] PWM frequency to control actuator

but in this phase If I change IN1 frequency, then VDS register bit act differently in the same voltage input like below

-80[khz] PWM input (voltage condition 16[v], actuator current 1.5[A/channel], there are 4 channel)

- 30[khz] PWM input

VDS register bit is set sensitively if receive lower PWM input even if in same voltage and same actuator current environment

There's only one different thing. PWM frequency.

We are planning to design fail safe concept by using this register information, so we have to know the root reason thoroughly

Can I know the reason why?

  • Hello,

    Please see section 8.2.2.1 and 8.2.2.2 of the datasheet.  I suspect you are having issues driving the FETs at the higher frequency.  This slow turn on will cause the FET to operate in a high ohmic region and result in a larger than expected Vds that will trip the proteciton.

    Regards,

    Ryan