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DRV8343-Q1: Questions on Data Sheet

Shinichi Yokota
Genius 9715 points
Part Number: DRV8343-Q1

Hello,

I have several questions on the DRV8343-Q1 data sheet.

  • 1PWM_COM bit in IC1 Control register:
    • Is the 1PWM_COM bit effective only in 1x PWM mode?
    • In the other mode than the 1x PWM, is the default rectification setting is synchronous?
  • 1PWM_DIR bit in IC1 Control register:
    • Is the 1PWM_DIR bit effective only in 1x PWM mode?
  • Equations (8) and (10) in the "9.2.1.2.2 IDRIVE Configuration" section:
    • Is the equation (8) "IDRIVEP > Qgd × tr" correct? I suspect it must be "IDRIVEP > Qgd ÷ tr".
    • Is the equation (10) "IDRIVEP = 12 nC / 1000 ns 14 mA" correct? I suspect it must be "IDRIVEP = 14 nC / 1000 ns = 14 mA".
    • Accordingly, is the description above the equation (10) correct?
      • "Use Equation 10 to calculate the value of IDRIVEP for a gate-to-drain charge of 14 nC and a rise time from 100 to 300 ns."
  • EN_SHT_TST and EN_OLP bits in IC2 Control register:
    • When should these bits activated? Right before performing these diagnostics?

Best regards,
Shinichi Yokota

  • 0
    TI__Mastermind 23045 points

    Hello Yokota-san,

    Thank you for your questions and for posting to the MD forum. You can find my responses highlighted below.

    • 1PWM_COM bit in IC1 Control register:
      • Is the 1PWM_COM bit effective only in 1x PWM mode? Yes this bit is only effective in 1xPWM mode
      • In the other mode than the 1x PWM, is the default rectification setting is synchronous? That is correct the default is set to synchronous rectification
    • 1PWM_DIR bit in IC1 Control register:
      • Is the 1PWM_DIR bit effective only in 1x PWM mode? Yes this bit is only effective in 1xPWM mode, along with 1PWM_BRAKE
    • 9.2.1.2.2 IDRIVE Configuration, equations (8) and (10):
      • Is the equation (8) "IDRIVEP > Qgd × tr" correct? I suspect it must be "IDRIVEP > Qgd ÷ tr". As mentioned the formula should be IDRIVEP > Qgd ÷ tr
      • Is the equation (10) "IDRIVEP = 12 nC / 1000 ns 14 mA" correct? I suspect it must be "IDRIVEP = 14 nC / 1000 ns = 14 mA". The datasheet will be corrected to have a 12nC Qgd so the figure will show  IDRIVEP = 12 nC / 1000 ns = 12 mA
      • Accordingly, is the description above the equation (10) correct?
        • "Use Equation 10 to calculate the value of IDRIVEP for a gate-to-drain charge of 14 nC and a rise time from 100 to 300 ns." The recommendation made in the description of selecting a rise time of 100ns to 300ns is correct, unfortunately the recommendation does not match the example in this instance but this is the rise time we typically recommend to customers.

    Please note that there is also wording that mentions IDRIVEN is independent of IDRIVEP, but this is not the case IDRIVEN = 2 x IDRIVEP. There are updates that need to be pushed out for this datasheet but have not been completed yet by the systems team, but the IDRIVE sections mentioned will be corrected in the next datasheet update.

    • EN_SHT_TST and EN_OLP bits in IC2 Control register:
      • When should these bits activated? Right before performing these diagnostics? These bits should be activated when the diagnostics are going to be ran. You can read more about the steps that should be follow in section 8.3.5.8 and 8.3.5.9 of the datasheet. In the hardware device these tests are ran at power up or when the device is going to sleep mode, keep in mind they are not ran at the same time but instead follow a sequence.

    I hope this answers all of your questions!

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    TI__Genius 9715 points

    Isaac,

    Please let me ask some additional questions.

    • Which value 0b or 1b must be set to bit 5 (CBC) of the register IC11 to enable the CBC function?
    • I guess 100% duty cycle is doable thanks to the charge pump, but can a diagnostic function interrupt it and break the 100% duty cycle?
    • Under the condition of VUVLO > VVM, is it correct to understand that a UVLO is detected when the ENABLE pin is High and a UVLO is not detected when it's Low?
    • Is it possible for you to provide me with the actual performance of VOFF - input offset error of the current shunt amplifier?

    Best regards,
    Shinichi Yokota

  • 0 in reply to Shinichi Yokota
    TI__Mastermind 23045 points

    Hello Yokota-san,

    Glad to help out here is my response to the following questions:

    • Which value 0b or 1b must be set to bit 5 (CBC) of the register IC11 to enable the CBC function? In order to enable CBC function it has to be set to a 1b and keep in mind that CBC only applies in OCP_MODE = 01b for Automatic Retry.
    • I guess 100% duty cycle is doable thanks to the charge pump, but can a diagnostic function interrupt it and break the 100% duty cycle? Yes 100% duty cycle is achievable thanks to the charge pump circuitry available in the device. Some of the diagnostic features require the half bridges to be in a Hi-Z state during the duration of the test, others require small PWM duty cycles. Is there a specific diagnostic feature they are interested in running while the device is at 100% PWM duty cycle?
    • Under the condition of VUVLO > VVM, is it correct to understand that a UVLO is detected when the ENABLE pin is High and a UVLO is not detected when it's Low? There is two conditions when UVLO is not detected, the first one depends on the voltage when VVM is less than ~3.3V the digital core is not enabled, so no digital core means no  VUVLO detection. The second one is as you mentioned, you are correct if the ENABLE pin is low then the device will not show a UVLO fault.
    • Is it possible for you to provide me with the actual performance of VOFF - input offset error of the current shunt amplifier? This has been characterized in the datasheet, I will include the spec below if there are any inconsistencies feel free to let met know.

               

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    TI__Genius 9715 points

    Isaac,

    Thanks for your quick feedback.

    Isaac Lara said:
    • Is it possible for you to provide me with the actual performance of VOFF - input offset error of the current shunt amplifier? This has been characterized in the datasheet, I will include the spec below if there are any inconsistencies feel free to let met know.

               

    Yes, I understand that there are specs in the data sheet. However, I'd like to know about the real performance of this parameter. Could you provide me with such values as average, stddev, Min, and Max from the characterization data?

    Best regards,
    Shinichi Yokota

  • 0 in reply to Shinichi Yokota
    TI__Mastermind 23045 points

    Hello Shinichi-san,

    Could you please take the VOFF characterization question to the internal forum? I cannot provide the data through here. Thank you!

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    TI__Genius 9715 points

    Isaac,

    By the way,

    Isaac Lara said:
    I guess 100% duty cycle is doable thanks to the charge pump, but can a diagnostic function interrupt it and break the 100% duty cycle? Yes 100% duty cycle is achievable thanks to the charge pump circuitry available in the device. Some of the diagnostic features require the half bridges to be in a Hi-Z state during the duration of the test, others require small PWM duty cycles. Is there a specific diagnostic feature they are interested in running while the device is at 100% PWM duty cycle?

    My question asked if a diagnostic function automatically and unintentionally interrupts a 100% duty cycle and breaks it. If any diagnostic needs to be initiated by a user and doesn't start unintentionally, that's OK.

    Best regards,
    Shinichi Yokota

  • 0 in reply to Shinichi Yokota
    TI__Mastermind 23045 points

    Hello Shinichi,

    Most diagnostics that run automatically occur at power up, as device wakes up from sleep mode, or when the device is not commutating the motor. The OLA diagnostic runs while the motor is being commutated if active in SPI or hardware but does not prevent 100% PWM duty cycle from working as it should.

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    TI__Genius 9715 points

    Isaac,

    Please let me ask a new additional question.

    • When the ENABLE pin is pulled up to the DVDD pin, which diagnostic function will automatically run at device start-up?

    Best regards,
    Shinichi Yokota

  • 0 in reply to Shinichi Yokota
    TI__Mastermind 26046 points

    Hi Yokota-san,

    Diagnostics are below. 

    Always running:
    UVLO
    CPUV
    OTW
    OTSD

    If nDIAG is left floating or connected to GND:
    Short to battery (SHT_BAT)
    Short to GND (SHT_GND)
    Open load passive (OLP)

    Thanks,
    Aaron