DRV8714-Q1: SPI write execution timing

Akihiro Hirata

Part Number: DRV8714-Q1

Hello team,

When we send the write command to the DRV8714S-Q1 via SPI like below configuration, which timing is this write command written in the SPI register?

Is this the rising edge of the nSCS?

Thanks.

Regards,

Hirata

over 3 years ago

0 Ryan Kehr over 3 years ago

TI__Guru 55605 points

Hirata-san,

Will reply by Monday, Jan 31.

Regards,

Ryan

+1 Shinya Morita over 3 years ago

TI__Mastermind 44705 points

Hi Hirata san

Written timing is the rising edge of nSCS.

Just note: This device ignores more or less 16clk command. Therefore device should be written with nSCS rising. Cannot be written with 16th sck due to this error ignoring mechanism.

Could you share why your customer care about this? Timing wise, this difference should not be critical in system.

regards

Shinya Morita

0 Akihiro Hirata over 3 years ago in reply to Shinya Morita

TI__Expert 6200 points

Hi Morita-san,

There is not a concern but we just would like to know the exact timing.

I appreciate your support.

Regards,

Hirata

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DRV8714-Q1: SPI write execution timing