DRV8340-Q1: In the DRV8340 SPI variant, sleep mode resets SPI registers. Is this documented anywhere?

Hi,

After a while of banging my head on the desk, I seem to have run into the behaviour that sleep mode is resetting SPI registers.

It took me a while to figure out that sleep mode is what was resetting the SPI registers, because there doesn't seem to be any

explicit mention of this in the datasheet, as far as I can see.

Now that I have re-read the datasheet, I see that under section 8.4.1.1, describing the sleep mode, the datasheet mentions:

In sleep mode, all gate drivers are disabled, all external MOSFETs are disabled, the
charge pump is disabled, the DVDD regulator is disabled, and the SPI bus is disabled.

Now from that I can kind of infer that this is what's going in, but I'd like to have someone confirm that this in in fact known behaviour.

Any info would be much appreciated.

Kind regards,

Joey