DRV8343-Q1: Unused INx/ILx/GHx/GLx/SHx/DLx/SLx Pins

Hi Yokota-san,

When a 1/2 bridge is disabled:

1) INHx/INLx - tie to GND or float
2) Tie GHx to SHx
3) Tie DLx, GLx, and SLx together

Tying INHx/INLx to GND or floating will keep inputs low. Keeping inputs low will disable VDS overcurrent monitoring because it is active when inputs are high. 

VGS monitoring is always active, and it will expect VGS to be "off" depending on state of the input pins. Since inputs will always be 0, VGS should always be 0V, so tying gate to source for each gate driver output is recommended. 

Thanks,
Aaron

Yokota-san,

What I meant is if you are not using the half bridge, above is how you deal with the unused pins. This will be okay no matter which mode the DRV8343-Q1 is using, including independent 1/2 bridge mode, because the inputs will be tied to GND and VGS voltages will always remain 0V.

Thanks,
Aaron

Hi Yokota-san, 

Yes, you are correct. 

Thanks,
Aaron