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DRV8353R: How can we better protect our DRV smart gate driver

Part Number: DRV8353R

We've been quite happy and impressed with the programmability, performance, and feature set of the DRV8353R as well as the other DRV parts we've used over the years. Something we continue to struggle with, however, is a high rate of GDF and other gate driver related failures during prototyping and testing. These tend to crop up frequently especially when we are trying to push motors into overmodulation (overmodulation above 0.57 or 100% sinusoidal duty cycle) and can also happen at other times both randomly and when we get noise events when using hall effect sensors that result in brief miscommutation. Is it possible or recommended that we add Zener diodes or other protection features to the gate drive lines and/or the VM input pins to better guard against this? The DRV for the post part tends to protect the power stage (FETs) but that doesn't really help a lot if the DRV part itself still fails. Would setting tighter controls / limits on the VDS voltage, OCP, and other limits also help? We tend to leave these limits a little more open during prototyping and testing, but we'd really like to lower the incidents of failures we are seeing and we are very concerned this may crop in production hardware if we choose to move forward.

  • Hi Drew,

    Thank you for your questions! I have a few questions to better understand the issue:

    1. Once a gate drive fault occurs, are you able to power cycle the device and then operate it normally? Or is it that once a GDF occurs then the device is damaged and needs to be replaced? 

    2. What is the Qgd value of the MOSFETs that you are using? What is the IDRIVE setting that you are using? One thing that I have seen is that if the IDRIVE value is set too high for the MOSFETs, then the ringing/oscillation on the gates and sources of the MOSFETs caused by high gate drive current can lead to damage which then results in a GDF that will occur every time you try to run the motor. At higher currents the ringing on the source node will be more severe, so it could be that this issue is not observed at first until the ringing is sufficient enough to damage the driver.

    Regards,

    Anthony Lodi

  • Anthony,

    Thanks for the quick reply. In our most recent case, the failures have occurred while using the DRV8353RS-EVM development kit. We were running on a battery around 24V and at phase currents between 15A and 30A peak (for brief periods). In this case, the GDF failure occurs and even after power cycling is still present. In my past experience the only way to clear this type of failure is to replace the DRV IC or disable the GDF fault. In the latter case, this usually just results in poor performance and/or leads to an eventual total failure (to be expected). We are aware of using the an IDRIVE value that is too high and in this case, we are using the default IDRIVE values for the DRV8353RS-EVM. We are just wondering if there is any additional protections that can be added to the gate drive lines to better protect the DRV part from ringing or other voltage transients. Those lines do seem to be fairly sensitive and prone to this type of failure.

    Regards,

    Drew

  • Hi Drew,

    We have an app note that discusses various techniques to consider to help mitigate ringing issues, which is especially geared toward high power applications. I have attached it below, hopefully it will be a useful guide in your design process.

    Regarding the DRV8353RS-EVM, I would recommend changing the IDRIVE settings in the SPI registers to the lowest value, since the Qgd of the MOSFETS for that EVM are really low and even the default IDRIVE value of the GUI can still cause issues sometimes. One version of the GUI (I think it is the online version) defaults to the Max IDRIVE setting, which can especially cause issues. The other version defaults to a lower value (I think 150mA/300mA), but even that can in some instances cause issues. We will likely update the GUI to default to the minimum IDRIVE value in the near future.  

    Regards,

    Anthony Lodi

    System Design Considerations for High-Power Motor Driver Applications.pdf

  • Anthony,

    Thanks for the additional clarification and information. I'll take a look at that application note and reach out if we have any further issues. We will err on the side of caution and try to use lower IDRIVE values in the future. Obviously we might have slightly higher losses in the FETs but I do think that and this application note are good places to start.

    Regards,

    Drew

  • Hi Drew,

    Sounds good! 

    Regards,

    Anthony Lodi