Other Parts Discussed in Thread: DRV8300
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Hi Dan,
What is the battery voltage? Ensure that when you measure the high side gate, you are measuring with respect to the high-side source (SHx). If SHx is 10.5V-11V, then the DRV8300 keeps GHx to 10.5-11V to ensure a VGS voltage of 0V for the high side FETs.
When switching the half bridge, are you using synchronous rectification to refresh the bootstrap capacitors? When INLx = high, the bootstrap caps should charge to GVDD. Is there enough INLx on time to ensure the bootstrap caps fully charge?
Are the caps rated correctly in voltage? They should be rated for 1.5x to 2x their DC bias voltage, so for instance, the boostrap caps should be rated for at least GVDD*2 = 25V to ensure its effective capacitance.
You may also want to consider an external Rgs pulldown resistor (10k to 100k) after the series gate resistors to try and pulldown the gates harder.
If none of the suggestions work, we may want to review layout as a next step.
Thanks,
Aaron
Thanks Dan!
Appreciated on the update, and glad to hear that your setup is working now
Best Regards,
Andrew