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DRV8244-Q1: OLP completion time

Akihiro Hirata
Expert 6200 points
Part Number: DRV8244-Q1

Hello team

When we do the OLP, how long should we wait to get the true OLP CMP Output?

There is a description of the "record the comparator output after its output is settled."

And there seems a filter circuit at the input of the comparator.

So I assume we should wait for a certain time to get true value of the OLP CMP output.

Thanks in advance.

Regards,

Hirata

  • 0
    TI__Mastermind 37683 points

    Hello Hirata-san,

    Akihiro Hirata said:
    When we do the OLP, how long should we wait to get the true OLP CMP Output?

    The OLP detection time will be from when the OLP diagnostics begins to when the value of nFAULT drops LOW to signal an OLP fault. We don't have this exact time specified in the datasheet because there can be many uncontrolled variables that will cause this time to differ from application to application.

    Is there a specific reason why you or the client need to know this specification?

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hello Pablo-san,

    Thanks for your answer. I understood the basic idea.

    But don't you have any data? Typical is good now.

    What is the expected order of the time for the OLP completion in general? for example, "10^-4[s] to 10^-3[s] range is expected" in general or so...

    I believe this is heavily dependent on the capacitance attached to the phase node.

    Even if there is 1uF capacitance in the phase node, RC time constant is 10^-3[s] because pullup/down is 1kOhm.

    I believe 1uF at the phase node is too big for the assumption, so I guess 10^-3[s] is sufficient.

    I just want to make sure.

    To recognize which fault occurs we need to attempt 3 patterns sequentially, correct?

     

    I appreciate your support.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hi Hirata-san,

    Akihiro Hirata said:
    What is the expected order of the time for the OLP completion in general? for example, "10^-4[s] to 10^-3[s] range is expected" in general or so...

    I'm not sure. I'll have to contact our systems or design engineers to know the order of the OLP detection time. Let me check and I'll get back to you within 24-48 hours.

    Akihiro Hirata said:
    To recognize which fault occurs we need to attempt 3 patterns sequentially, correct?

    This is correct. As mentioned in the DS, the user has to go through each combination and look at the comparator output to determine if there is an OLP event.

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hi Pablo-san,

    I understood. Looking forward to your feedback.

    And thanks for the separate email as well.

    I appreciate your support.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hirata-san,

    I'll need more time to gather the information. I will let you know as soon as I hear back.

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hi Pablo-san,

    I understood. Thanks for your cooperation.

    By the way from tomorrow to 8th May, Japan has big holiday season called golden week.

    Response will be delayed. Just let you know in advance.

    I appreciate your support.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hirata-san,

    Thanks for the heads up.

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hi Pablo-san,

    Do you have any update?

    Thanks.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hi Hirata-san,

    No update yet. Will ask design team for an update,

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hi Pablo-san,

    I understood. I look forward to your feedback.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Guru 55605 points

    Hirata-san,

    I believe Pablo is still waiting for an update.  Thank you for your patience.

    Regards,

    Ryan

  • 0 in reply to Ryan Kehr
    TI__Expert 6200 points

    Hello Ryan-san, Pablo-san,

    Do you have any update?

    Thanks for your support.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hi Hirata-san,

    Apologies for the long wait. I'm still waiting for a response from the design team. They are very busy at the moment so they haven't had the chance to get back to me. I have already pinged them again and will push to get a reply by this week.

  • 0 in reply to Pablo Armet
    TI__Mastermind 37683 points

    Hi Hirata-san,

    Just got a reply from design team. Below is the response:

    "There is no de-glitch time for OLP. The timing on the output would be the same as the nFAULT time in general, determined by the nFAULT pull-up resistor, pull-down current, and the cap on the nFAULT pin."

    I hope this answers the customer question.

  • 0 in reply to Pablo Armet
    TI__Expert 6200 points

    Hi Pablo-san,

    I think designer is answering the delay at the nFAULT portion.

    But this is not the question which we are asking. If I misunderstood please correct me.

    The original question is below.

    **********************************************************

    When we do the OLP, how long should we wait to get the true OLP CMP Output?

    There is a description of the "record the comparator output after its output is settled."

    And there seems a filter circuit at the input of the comparator.

    So I assume we should wait for a certain time to get true value of the OLP CMP output.

    What is the expected order of the time for the OLP completion in general? for example, "10^-4[s] to 10^-3[s] range is expected" in general or so...

    **********************************************************

    We need to wait some time before we judge the OLP results.

    I would like how long the user should wait in general? I understood  there can be many uncontrolled variables that will cause this time to differ from application to application. but I would like to know if you have some expectation for time to wait.

    Thanks.

    Regards,

    Hirata

  • 0 in reply to Akihiro Hirata
    TI__Mastermind 37683 points

    Hi Hirata-san,

    The OLP_CMP is tied to the nFAULT pin of the device. As soon as the OLP_CMP output is settled, the nFAULT voltage will also change state. Well actually nFAULT will change states slightly after the OLP_CMP and depends on the nFAULT capacitance.

    I'm not sure if I am not understanding the customer question correctly but to me the answer I provided is reasonable. But let me know if I misunderstood the question.