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DRV8718S-Q1EVM: Query on SPI Clock Fault setting high.

Part Number: DRV8718S-Q1EVM


Hello everyone,

I am using the DRV8718S-Q1 evaluation board to drive the motor through SPI commands from an external controller. 

Here, I see the SPI_OK  bit setting in the IC_STAT1 register and SCLK_FLT bit setting in the IC_STAT2 register after running the code for a certain time duration, even though the Clock Fault is set I am able to read and write the desired values from the status and control registers respectively.

What should be the desired behavior if these particular bits are set?

Thanks and Regards,

Dhanush B N

  • Hello,

    Can you please clarify the following statement:

    --> Here, I see the SPI_OK  bit setting in the IC_STAT1 register

    Are you reading a "0" or a "1" for this bit? 

    Are you using the EVM code from onboard MSP430 or writing your own code?  

    Regards,

    Ryan

  • Hi Kehr,

    SPI_OK bit is read as "0".

    And, I am writing my own code by sending SPI commands to DRV8718S through an external controller.

    Thanks and Regards,

    Dhanush B N

  • Dhanush,

    We don't see these failures on the EVM.  If this is happening, potentially you have some noise on the SCLK lines if you are routing external signals to the board.  You should see some data you are writing ignored if you are getting these faults, but you said everything is OK?  

    I would try to clean up your connections as this should not be occurring in your final design.  

    Regards,

    Ryan