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DRV8244-Q1: Brake operation of brushed DC motor in PWM mode

Genius 17365 points
Part Number: DRV8244-Q1
Other Parts Discussed in Thread: DRV8701

Hello,

 

My customer is evaluating DRV8244-Q1 with the EVM.

Then they are facing a problem for the brake operation with a brushed DC motor.

 

According to the datasheet, the required IN1 and IN2 pattern in the PWM mode for brake operation is opposite, 0/0 for production sample and 1/1 for pre-production sample.

I’m not sure which sample is put on the EVM they are using, but they tested both IN1/IN2 = 0/0 and 1/1. It means they have tested both OUT1/2 = Hi-Z/Hi-Z and HIGH/HIGH.

Then then couldn’t see so much difference in both 0/0 and 1/1 setting and both were not like a brake operation. The motor continued to spin by its inertia in both setting.

So they couldn’t feel so-called brake operation with both setting.

 

DRV8244-Q1 uses high-side recirculation.

Then they tested with other motor driver IC using low-side recirculation like DRV8701(EVM) and others.

With these devices, the motor stopped soon after setting LOW/LOW outputs.

 

Then they have 2 questions.

 

1.

Regarding the brake effect, is there so much difference between high side recirculation and low side recirculation?

 

2.

They couldn’t feel brake effect in DRV8244-Q1.

Do you know the reason?

 

Regards,

Oba

  • Hi Oba,

    Thank you for your questions.

    I do not expect "Brake" is such a weak by HH braking. So I guess something is happening.

    -Is customer using SPI variant? If so, could you read DEVICE ID? I know truth table has error in pre-production sample not only PWM mode, but others. So better to identify which sample customer is evaluating.

    -Is there possibility some fault condition (e.g VMUV, TSD) is happing? Then output will be HiZ. Monitoring nFault or read FAULT_SUMMARY(address 0x01h) is the way to monitor fault flag.

    -If customer can measure OUT1 and OUT2 at the same time, it could tell whether both High(braking) or HiZ. If Hiz(both OFF), one of output should be Low. 

    regards

    Shinya Morita

  • Hello Morita-san,

    Thanks for your support. We found the root cause.
    They also used DRVOFF pin to control the status and due to this wrong DRVOFF signal, both cases were HI-Z/Hi-Z pattern.
    They changed the input signal pattern with DRVOFF=0 and confirmed it worked well.

    Thank you very much for your support.

    Regards,
    Oba